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-rw-r--r--techwsw/build/essence_of_hwsw.pdfbin63972 -> 79282 bytes
-rw-r--r--techwsw/essence_of_hwsw.tex5
-rw-r--r--techwsw/res/memorie/rom.pdfbin6280 -> 14914 bytes
-rw-r--r--techwsw/res/memorie/rom.svg743
-rw-r--r--techwsw/tex/memorie.tex41
5 files changed, 752 insertions, 37 deletions
diff --git a/techwsw/build/essence_of_hwsw.pdf b/techwsw/build/essence_of_hwsw.pdf
index b79ce0e..618f1a4 100644
--- a/techwsw/build/essence_of_hwsw.pdf
+++ b/techwsw/build/essence_of_hwsw.pdf
Binary files differ
diff --git a/techwsw/essence_of_hwsw.tex b/techwsw/essence_of_hwsw.tex
index 77634a5..17416ea 100644
--- a/techwsw/essence_of_hwsw.tex
+++ b/techwsw/essence_of_hwsw.tex
@@ -7,10 +7,13 @@
\usepackage{float}
\usepackage{graphicx}
+% tables
+\usepackage{array}
+
% language
\usepackage[italian]{babel}
-\title{Hardware e Software}
+\title{Essenza di Hardware e Software}
\author{Naoki Pross}
\begin{document}
diff --git a/techwsw/res/memorie/rom.pdf b/techwsw/res/memorie/rom.pdf
index bb2939e..07cd818 100644
--- a/techwsw/res/memorie/rom.pdf
+++ b/techwsw/res/memorie/rom.pdf
Binary files differ
diff --git a/techwsw/res/memorie/rom.svg b/techwsw/res/memorie/rom.svg
index 292dce7..bd1cf89 100644
--- a/techwsw/res/memorie/rom.svg
+++ b/techwsw/res/memorie/rom.svg
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diff --git a/techwsw/tex/memorie.tex b/techwsw/tex/memorie.tex
index eb0fa5c..5049406 100644
--- a/techwsw/tex/memorie.tex
+++ b/techwsw/tex/memorie.tex
@@ -17,21 +17,45 @@ In questo tipo di memoria come implica il nomele informazioni vengono conservate
permanentemente nella configurazione del circuito, siccome esso sono costituite
da un decodificatore ed un codificatore.
-%% TODO: schema intero rom
+\begin{figure}[h!]
+ \centering
+ \includegraphics[width=\textwidth]{res/memorie/rom}
+\end{figure}
-\subsubsection{Programmable Read Only Memory ({\tt PROM})}
+Ogni indirizzo in $A$ corrisponde una riga che accende i bit sull'uscita $Y$
+in base alle connessioni presenti tra le linee dei dati e le linee delle parole.
+La connessione pu\`o essere costruita con differenti componenti, creando quindi
+differenti tipi di ROM.
+
+\begin{table}[h!]\centering
+{\def\arraystretch{2}\tabcolsep=6pt
+\begin{tabular}{ >{\ttfamily}p{.12\textwidth} p{.28\textwidth} p{.5\textwidth} }
+\rmfamily Acronimo & Nome & Caratteristica \\
+\hline
+ROM & Read Only Memory & Programmata in fabbrica \\
+PROM & Programmable ROM & Programmabile dall'utente una volta sola, per sempre.
+ La programmazione avviene bruciando dei fusibili. \\
+EPROM & Erasable PROM & Programmabile pi\`u volte dall'utente. \`E possibile
+ cancellare il contenuto esponendo il chip ai raggi UV per 15 - 20 min. \\
+EEPROM o E\textsuperscript{2}ROM & Electronically Erasable PROM & Programmabile
+ pi\`u volte dall'utente, la memoria viene riscritta in pochi millisecondi
+ utilizzando dei segnali elettrici.
+\end{tabular}
+}
+\end{table}
\subsection{Memorie non volatili ({\tt NVRWM})}
\subsection{Memorie a scrittura e lettura}
\subsubsection{Random Access Memory ({\tt RAM})}
In una memoeria ad acesso casuale, o memoria RAM (Random Access Memory), una
-qualsiasi locazione (della) \`e individuata da un numero (indirizzo o address) e
+qualsiasi locazione \`e individuata da un numero (indirizzo o address) e
il suo contenuto pu\`o essere letto o modificato in un intervallo di tempo
costante detto \emph{tempo di accesso} $t_a$.
%% doc: 01c memorie principali.pdf
\begin{figure}[h!]
+ \centering
\includegraphics[width=\textwidth]{res/memorie/ram}
\end{figure}
@@ -46,12 +70,13 @@ tramite il demultiplexer.
DRAM} (dynamic RAM) sono dei microcondensatori C-MOS nei quali 1 corrisponde al
condensatore carico e 0 corrisponde al condensatore scarico.
-% Nella pratica si utano sempre RAM dinamice per l'elevata capacitit\`a di
-% integrazione e per i costi pi\`u bassi rispetto a quelle statiche.
-
-\paragraph{La RAM dinamica} avendo un comportamento elettrico tipico dei
+\paragraph{La RAM dinamica ({\tt DRAM})} avendo un comportamento elettrico tipico dei
condenstatori, essa \`e soggetta alla scarica, cio\`e tende a perdere l'informazione
contenuta, perci\`o necessitano di essere ricaricate regolarmente con della
circuiteria che esegue un \emph{refresh}.
-$$\cdot$$
+\paragraph{La RAM statica ({\tt SRAM})} essendo un FF, \`e in grado di mantenere le
+informazioni per un tempo indeterminao affinch\`e ci sia l'alimentazione. Gli
+svantaggi delle SRAM rispetto alle DRAM sono dal consumo energetico (potenza
+dissipata) e la dimensisone, che rendono la densit\`a di bit per unit\`a di area
+minore. Come vantaggio invece le SRAM tendono ad essere pi\`u veloci delle DRAM.