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author | Nao Pross <naopross@thearcway.org> | 2018-05-04 16:57:26 +0200 |
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committer | Nao Pross <naopross@thearcway.org> | 2018-05-04 16:57:26 +0200 |
commit | 67c20bb8dff3cb74c5aacfa3c6c799c39daad50f (patch) | |
tree | c543cbc1c99e250dfe14f021791739279afc7a0b /hal/uart.tpp | |
parent | Fix indent, replace tabs with spaces (diff) | |
download | SAMLiquidSmoke-67c20bb8dff3cb74c5aacfa3c6c799c39daad50f.tar.gz SAMLiquidSmoke-67c20bb8dff3cb74c5aacfa3c6c799c39daad50f.zip |
Add templated generic implementaions for uart, rename uart1.tpp to uart.tpp
Diffstat (limited to '')
-rw-r--r-- | hal/uart.tpp | 105 |
1 files changed, 105 insertions, 0 deletions
diff --git a/hal/uart.tpp b/hal/uart.tpp new file mode 100644 index 0000000..44d9315 --- /dev/null +++ b/hal/uart.tpp @@ -0,0 +1,105 @@ +/* + * File: uart.cpp + * Author: naopross + * + * Created on May 2, 2018, 7:05 PM + */ + +#include "uart.hpp" + +extern "C" { +#include <proc/p32mx470f512h.h> +#include <sys/attribs.h> +} + + +/* templated functions */ +namespace uart +{ + template<unsigned dev> + uint8_t peek<dev>(uint16_t offset) + { + if (offset >= rx_buffer[dev -1].size()) + return 0; + else + return rx_buffer[dev -1].at(offset); + } + + template<unsigned dev> + bool rx_buffer_empty<dev>() + { + return rx_buffer[0].empty(); + } + + template<unsigned dev> + bool tx_buffer_full<dev>() + { + return !tx_buffer[0].empty(); + } +} + + +/* specialization for UART1 */ +void __ISR(_UART_1_VECTOR, IPL1AUTO) usart_1_isr() +{ + if (IFS1bits.U1RXIF) { + uart::rx_buffer[0].push_back(static_cast<uint8_t>(U1RXREG)); + + IFS1bits.U1RXIF = 0; + } else if (IFS1bits.U1TXIF) { + + IFS1bits.U1TXIF = 0; + } +} + +namespace uart +{ + template<> + void initialize<1>() + { + // STSEL 1S; + // IREN disabled; + // PDSEL 8N; + // RTSMD disabled; + // RXINV disabled; + // SIDL disabled; + // WAKE disabled; + // ABAUD disabled; + // LPBACK disabled; + // BRGH enabled; + // UEN TX_RX; + // ON enabled; + U1MODE = 0x8008; + // UTXISEL TX_ONE_CHAR; + // UTXINV disabled; + // ADDR 0; + // URXEN disabled; + // OERR disabled; + // ADM_EN disabled; + // URXISEL RX_ONE_CHAR; + // UTXBRK disabled; + // UTXEN disabled; + // ADDEN disabled; + U1STA = 0x0; + // U1TXREG 0; + U1TXREG = 0x0; + // BaudRate = 9600; + // Frequency = 1000000 Hz; + // BRG 25; + U1BRG = 0x19; + + IEC1bits.U1RXIE = 1; + + U1STAbits.UTXEN = 1; + U1STAbits.URXEN = 1; + + //Enabling UART + U1MODEbits.ON = 1; + } + + template<> + uint8_t read<1>() + { + + } +} |