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author | Nao Pross <naopross@thearcway.org> | 2018-05-04 01:37:04 +0200 |
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committer | Nao Pross <naopross@thearcway.org> | 2018-05-04 01:37:04 +0200 |
commit | 7bec778c9a59416e3214ac28a6bce29dd03c9c00 (patch) | |
tree | a21c42d3ae7d6909963ce9b4818f90ae1b15c454 /hal | |
parent | Start own HAL implementation based on MCC's generated files (diff) | |
download | SAMLiquidSmoke-7bec778c9a59416e3214ac28a6bce29dd03c9c00.tar.gz SAMLiquidSmoke-7bec778c9a59416e3214ac28a6bce29dd03c9c00.zip |
Update pin class to support input and output mode
Also, minor changes in uart1.tpp
Diffstat (limited to 'hal')
-rw-r--r-- | hal/pin.hpp | 31 | ||||
-rw-r--r-- | hal/pin.tpp | 78 | ||||
-rw-r--r-- | hal/uart1.tpp | 5 |
3 files changed, 100 insertions, 14 deletions
diff --git a/hal/pin.hpp b/hal/pin.hpp index 9df22d4..6625f90 100644 --- a/hal/pin.hpp +++ b/hal/pin.hpp @@ -8,16 +8,39 @@ #ifndef PIN_HPP #define PIN_HPP -template<typename reg, unsigned bit> +template<unsigned bit> class pin { public: - pin(reg *r); + enum class mode : unsigned + { INPUT = 1, OUTPUT = 0 }; + + enum class state : unsigned + { ON = 1, OFF = 0 }; + + pin() = delete; + + template<typename latch_T, typename tris_T, typename port_T> + pin(latch_T *latch, tris_T *tris, port_T *port); + virtual ~pin(); - void set(bool v); + void set_mode(unsigned m); + void set_mode(mode m); + + state read() const; + + void set(unsigned s); + void set(state s); + + void toggle(); + + bool operator==(const pin<bit> &other) const; + bool operator!=(const pin<bit> &other) const; private: - reg *_register; + volatile uint8_t *_latch; + volatile uint8_t *_tris; + volatile uint8_t *_port; }; #endif /* PIN_HPP */
\ No newline at end of file diff --git a/hal/pin.tpp b/hal/pin.tpp index 4f6bd4a..c3c005f 100644 --- a/hal/pin.tpp +++ b/hal/pin.tpp @@ -7,24 +7,82 @@ #include "pin.hpp" -template<typename reg, unsigned bit> -pin<reg, bit>::pin(reg *r) + +template<unsigned bit> +template<typename latch_T, typename tris_T, typename port_T> +pin<bit>::pin(latch_T *latch, tris_T *tris, port_T *port) : + _latch(reinterpret_cast<volatile uint8_t *>(latch)), + _tris(reinterpret_cast<volatile uint8_t *>(tris)), + _port(reinterpret_cast<volatile uint8_t *>(port)) { - _register = r; + // default settings + set_mode(pin<bit>::mode::OUTPUT); + set(pin<bit>::state::OFF); } -template<typename reg, unsigned bit> -pin<reg, bit>::~pin() +template<unsigned bit> +pin<bit>::~pin() { } -template<typename reg, unsigned bit> -void pin<reg, bit>::set(bool v) + +template<unsigned bit> +void pin<bit>::set_mode(unsigned m) +{ + if (m) + *_tris |= 1<<bit; + else + *_tris &= ~(1<<bit); +} + +template<unsigned bit> +void pin<bit>::set_mode(pin<bit>::mode m) +{ + set(static_cast<unsigned>(m)); +} + +template<unsigned bit> +typename pin<bit>::state pin<bit>::read() const +{ + if (*_tris & (1<<bit)) + return state::ON; + else + return state::OFF; +} + +template<unsigned bit> +void pin<bit>::set(unsigned s) { - if (v) - *reinterpret_cast<volatile uint8_t *>(_register) |= 1<<bit; + if (s) + *_latch |= 1<<bit; else - *reinterpret_cast<volatile uint8_t *>(_register) &= ~(1<<bit); + *_latch &= ~(1<<bit); +} + +template<unsigned bit> +void pin<bit>::set(pin<bit>::state s) +{ + set(static_cast<unsigned>(s)); +} + +template<unsigned bit> +void pin<bit>::toggle() +{ + *_latch ^= 1<<bit; +} + +template<unsigned bit> +bool pin<bit>::operator==(const pin<bit> &other) const +{ + return (_latch == other._latch + && _tris == other._tris + && _port == other._port); +} + +template<unsigned bit> +bool pin<bit>::operator!=(const pin<bit> &other) const +{ + return !(*this == other); }
\ No newline at end of file diff --git a/hal/uart1.tpp b/hal/uart1.tpp index a8a32f0..9526650 100644 --- a/hal/uart1.tpp +++ b/hal/uart1.tpp @@ -17,6 +17,11 @@ void __ISR(_UART_1_VECTOR, IPL1AUTO) usart_1_isr() { if (IFS1bits.U1RXIF) { uart::rx_buffer[0].push_back(static_cast<uint8_t>(U1RXREG)); + + IFS1bits.U1RXIF = 0; + } else if (IFS1bits.U1TXIF) { + + IFS1bits.U1TXIF = 0; } } |