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-rw-r--r--hal/pin.hpp26
-rw-r--r--hal/pin.tpp52
-rw-r--r--hal/uart.hpp58
-rw-r--r--hal/uart1.tpp52
4 files changed, 94 insertions, 94 deletions
diff --git a/hal/pin.hpp b/hal/pin.hpp
index 6625f90..384c0c7 100644
--- a/hal/pin.hpp
+++ b/hal/pin.hpp
@@ -6,20 +6,20 @@
*/
#ifndef PIN_HPP
-#define PIN_HPP
+#define PIN_HPP
template<unsigned bit>
class pin {
public:
- enum class mode : unsigned
- { INPUT = 1, OUTPUT = 0 };
+ enum class mode : unsigned
+ { INPUT = 1, OUTPUT = 0 };
- enum class state : unsigned
- { ON = 1, OFF = 0 };
+ enum class state : unsigned
+ { ON = 1, OFF = 0 };
- pin() = delete;
+ pin() = delete;
- template<typename latch_T, typename tris_T, typename port_T>
+ template<typename latch_T, typename tris_T, typename port_T>
pin(latch_T *latch, tris_T *tris, port_T *port);
virtual ~pin();
@@ -27,9 +27,9 @@ public:
void set_mode(unsigned m);
void set_mode(mode m);
- state read() const;
+ state read() const;
- void set(unsigned s);
+ void set(unsigned s);
void set(state s);
void toggle();
@@ -38,9 +38,9 @@ public:
bool operator!=(const pin<bit> &other) const;
private:
- volatile uint8_t *_latch;
- volatile uint8_t *_tris;
- volatile uint8_t *_port;
+ volatile uint8_t *_latch;
+ volatile uint8_t *_tris;
+ volatile uint8_t *_port;
};
-#endif /* PIN_HPP */ \ No newline at end of file
+#endif /* PIN_HPP */
diff --git a/hal/pin.tpp b/hal/pin.tpp
index c3c005f..c6cf957 100644
--- a/hal/pin.tpp
+++ b/hal/pin.tpp
@@ -11,13 +11,13 @@
template<unsigned bit>
template<typename latch_T, typename tris_T, typename port_T>
pin<bit>::pin(latch_T *latch, tris_T *tris, port_T *port) :
- _latch(reinterpret_cast<volatile uint8_t *>(latch)),
- _tris(reinterpret_cast<volatile uint8_t *>(tris)),
- _port(reinterpret_cast<volatile uint8_t *>(port))
+ _latch(reinterpret_cast<volatile uint8_t *>(latch)),
+ _tris(reinterpret_cast<volatile uint8_t *>(tris)),
+ _port(reinterpret_cast<volatile uint8_t *>(port))
{
- // default settings
- set_mode(pin<bit>::mode::OUTPUT);
- set(pin<bit>::state::OFF);
+ // default settings
+ set_mode(pin<bit>::mode::OUTPUT);
+ set(pin<bit>::state::OFF);
}
@@ -31,58 +31,58 @@ pin<bit>::~pin()
template<unsigned bit>
void pin<bit>::set_mode(unsigned m)
{
- if (m)
- *_tris |= 1<<bit;
- else
- *_tris &= ~(1<<bit);
+ if (m)
+ *_tris |= 1<<bit;
+ else
+ *_tris &= ~(1<<bit);
}
template<unsigned bit>
void pin<bit>::set_mode(pin<bit>::mode m)
{
- set(static_cast<unsigned>(m));
+ set(static_cast<unsigned>(m));
}
template<unsigned bit>
typename pin<bit>::state pin<bit>::read() const
{
- if (*_tris & (1<<bit))
- return state::ON;
- else
- return state::OFF;
+ if (*_tris & (1<<bit))
+ return state::ON;
+ else
+ return state::OFF;
}
template<unsigned bit>
void pin<bit>::set(unsigned s)
{
- if (s)
- *_latch |= 1<<bit;
- else
- *_latch &= ~(1<<bit);
+ if (s)
+ *_latch |= 1<<bit;
+ else
+ *_latch &= ~(1<<bit);
}
template<unsigned bit>
void pin<bit>::set(pin<bit>::state s)
{
- set(static_cast<unsigned>(s));
+ set(static_cast<unsigned>(s));
}
template<unsigned bit>
void pin<bit>::toggle()
{
- *_latch ^= 1<<bit;
+ *_latch ^= 1<<bit;
}
template<unsigned bit>
bool pin<bit>::operator==(const pin<bit> &other) const
{
- return (_latch == other._latch
- && _tris == other._tris
- && _port == other._port);
+ return (_latch == other._latch
+ && _tris == other._tris
+ && _port == other._port);
}
template<unsigned bit>
bool pin<bit>::operator!=(const pin<bit> &other) const
{
- return !(*this == other);
-} \ No newline at end of file
+ return !(*this == other);
+}
diff --git a/hal/uart.hpp b/hal/uart.hpp
index 179dd4a..461f0fa 100644
--- a/hal/uart.hpp
+++ b/hal/uart.hpp
@@ -6,7 +6,7 @@
*/
#ifndef UART_HPP
-#define UART_HPP
+#define UART_HPP
#include <cstdint>
#include <cstddef>
@@ -21,33 +21,33 @@ void usart_4_isr();
namespace uart
{
- const unsigned devices_count = 4;
-
- enum class status : unsigned int
- {
- rx_data_available = 1<<0,
- rx_overrun_error = 1<<1,
- framing_error = 1<<2,
- parity_error = 1<<3,
- receiver_ide = 1<<4,
- tx_complete = 1<<8,
- tx_full = 1<<9,
- };
-
- enum class transfer_status : unsigned int
- {
- rx_full = 1<<0,
- rx_data_present = 1<<1,
- rx_empty = 1<<2,
- tx_full = 1<<3,
- tx_empty = 1<<4,
- };
-
- std::string rx_buffer[devices_count];
- std::string tx_buffer[devices_count];
-
- template<unsigned dev>
- void initialize();
+ const unsigned devices_count = 4;
+
+ enum class status : unsigned int
+ {
+ rx_data_available = 1<<0,
+ rx_overrun_error = 1<<1,
+ framing_error = 1<<2,
+ parity_error = 1<<3,
+ receiver_ide = 1<<4,
+ tx_complete = 1<<8,
+ tx_full = 1<<9,
+ };
+
+ enum class transfer_status : unsigned int
+ {
+ rx_full = 1<<0,
+ rx_data_present = 1<<1,
+ rx_empty = 1<<2,
+ tx_full = 1<<3,
+ tx_empty = 1<<4,
+ };
+
+ std::string rx_buffer[devices_count];
+ std::string tx_buffer[devices_count];
+
+ template<unsigned dev>
+ void initialize();
template<unsigned dev>
uint8_t peek(uint16_t offset);
@@ -83,5 +83,5 @@ namespace uart
bool tx_buffer_full();
}
-#endif /* UART_HPP */
+#endif /* UART_HPP */
diff --git a/hal/uart1.tpp b/hal/uart1.tpp
index 9526650..544ec73 100644
--- a/hal/uart1.tpp
+++ b/hal/uart1.tpp
@@ -15,36 +15,36 @@ extern "C" {
void __ISR(_UART_1_VECTOR, IPL1AUTO) usart_1_isr()
{
- if (IFS1bits.U1RXIF) {
- uart::rx_buffer[0].push_back(static_cast<uint8_t>(U1RXREG));
+ if (IFS1bits.U1RXIF) {
+ uart::rx_buffer[0].push_back(static_cast<uint8_t>(U1RXREG));
- IFS1bits.U1RXIF = 0;
- } else if (IFS1bits.U1TXIF) {
+ IFS1bits.U1RXIF = 0;
+ } else if (IFS1bits.U1TXIF) {
IFS1bits.U1TXIF = 0;
- }
+ }
}
namespace uart
{
- template<>
- void initialize<1>()
- {
- // STSEL 1S; IREN disabled; PDSEL 8N; RTSMD disabled; RXINV disabled; SIDL disabled; WAKE disabled; ABAUD disabled; LPBACK disabled; BRGH enabled; UEN TX_RX; ON enabled;
- U1MODE = 0x8008;
- // UTXISEL TX_ONE_CHAR; UTXINV disabled; ADDR 0; URXEN disabled; OERR disabled; ADM_EN disabled; URXISEL RX_ONE_CHAR; UTXBRK disabled; UTXEN disabled; ADDEN disabled;
- U1STA = 0x0;
- // U1TXREG 0;
- U1TXREG = 0x0;
- // BaudRate = 9600; Frequency = 1000000 Hz; BRG 25;
- U1BRG = 0x19;
-
- IEC1bits.U1RXIE = 1;
-
- U1STAbits.UTXEN = 1;
- U1STAbits.URXEN = 1;
-
- //Enabling UART
- U1MODEbits.ON = 1;
- }
-} \ No newline at end of file
+ template<>
+ void initialize<1>()
+ {
+ // STSEL 1S; IREN disabled; PDSEL 8N; RTSMD disabled; RXINV disabled; SIDL disabled; WAKE disabled; ABAUD disabled; LPBACK disabled; BRGH enabled; UEN TX_RX; ON enabled;
+ U1MODE = 0x8008;
+ // UTXISEL TX_ONE_CHAR; UTXINV disabled; ADDR 0; URXEN disabled; OERR disabled; ADM_EN disabled; URXISEL RX_ONE_CHAR; UTXBRK disabled; UTXEN disabled; ADDEN disabled;
+ U1STA = 0x0;
+ // U1TXREG 0;
+ U1TXREG = 0x0;
+ // BaudRate = 9600; Frequency = 1000000 Hz; BRG 25;
+ U1BRG = 0x19;
+
+ IEC1bits.U1RXIE = 1;
+
+ U1STAbits.UTXEN = 1;
+ U1STAbits.URXEN = 1;
+
+ //Enabling UART
+ U1MODEbits.ON = 1;
+ }
+}
generated by cgit v1.2.1 (git 2.18.0) at 2024-11-21 18:27:00 +0100