diff options
Diffstat (limited to 'hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG')
| -rw-r--r-- | hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG new file mode 100644 index 0000000..60e5407 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG @@ -0,0 +1,33 @@ +Removed Pin From Net: NetName=M\C\L\R\ Pin=P2-1 +Removed Pin From Net: NetName=VCC Pin=P2-2 +Removed Pin From Net: NetName=GND Pin=P2-3 +Removed Pin From Net: NetName=PGD Pin=P2-4 +Removed Pin From Net: NetName=PGC Pin=P2-5 +Removed Pin From Net: NetName=PGM Pin=P2-6 +Removed Member From Class: ClassName=Steps Member=P2 +Added Component: Designator=J1(95001-2661) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.molex.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink2Description"; Value = "Datasheet"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink2URL"; Value = "http://www.molex.com/cmc_upload/common_files/1222003_mx95001b.pdf"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink3Description"; Value = "Iges Model"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink3URL"; Value = "http://www.molex.com/pdm_docs/igs/95001-2441_igs.zip"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetDocument"; Value = "17-Dec-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DrillSize"; Value = "Nominal, Rounded to nearest 0.05mm"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDocument"; Value = "17-Dec-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "95001-2661"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PCB_Layout"; Value = "Complies with Manufacturer's Recommendation."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PCB_Mounting"; Value = "Thru-Hole"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PerformanceCategory"; Value = "3"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Ports"; Value = "1"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Positions/Loaded"; Value = "Port1 - 6/6"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "25-Jun-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Pin To Net: NetName=M\C\L\R\ Pin=J1-1 +Added Pin To Net: NetName=VCC Pin=J1-2 +Added Pin To Net: NetName=GND Pin=J1-3 +Added Pin To Net: NetName=PGD Pin=J1-4 +Added Pin To Net: NetName=PGC Pin=J1-5 +Added Pin To Net: NetName=PGM Pin=J1-6 +Added Member To Class: ClassName=Steps Member=Component J1 95001-2661 |