summaryrefslogtreecommitdiffstats
path: root/src/dist/default/production/src.production.map
diff options
context:
space:
mode:
Diffstat (limited to 'src/dist/default/production/src.production.map')
-rw-r--r--src/dist/default/production/src.production.map384
1 files changed, 384 insertions, 0 deletions
diff --git a/src/dist/default/production/src.production.map b/src/dist/default/production/src.production.map
new file mode 100644
index 0000000..35f3f69
--- /dev/null
+++ b/src/dist/default/production/src.production.map
@@ -0,0 +1,384 @@
+Microchip MPLAB XC8 Compiler V1.44 ()
+
+Linker command line:
+
+-W-3 --edf=C:\Program Files\Microchip\xc8\v1.44\dat\en_msgs.txt -cs \
+ -h+dist/default/production\src.production.sym \
+ --cmf=dist/default/production\src.production.cmf -z -Q18F44K22 \
+ -oC:\Users\_prossn\AppData\Local\Temp\s3s8.2 \
+ -Mdist/default/production/src.production.map -E1 -ver=XC8 \
+ -ASTACK=060h-02ffh -pstack=STACK -ACODE=00h-03FFFh -ACONST=00h-03FFFh \
+ -ASMALLCONST=0300h-03FFhx61 -AMEDIUMCONST=0300h-03FFFh -ACOMRAM=01h-05Fh \
+ -AABS1=00h-02FFh -ABIGRAM=01h-02FFh -ARAM=060h-0FFh,0100h-01FFhx2 \
+ -ABANK0=060h-0FFh -ABANK1=0100h-01FFh -ABANK2=0200h-02FFh \
+ -ASFR=0F38h-0F5Fh,0F60h-0FFFh \
+ -preset_vec=00h,intcode,intcodelo,powerup,init -pramtop=0300h \
+ -psmallconst=SMALLCONST -pmediumconst=MEDIUMCONST -pconst=CONST \
+ -AFARRAM=00h-00h -ACONFIG=0300000h-030000Dh -pconfig=CONFIG \
+ -AIDLOC=0200000h-0200007h -pidloc=IDLOC -AEEDATA=0F00000h-0F000FFh \
+ -peeprom_data=EEDATA \
+ -prdata=COMRAM,nvrram=COMRAM,nvbit=COMRAM,rbss=COMRAM,rbit=COMRAM \
+ -pfarbss=FARRAM,fardata=FARRAM,nvFARRAM=FARRAM \
+ -pintsave_regs=BIGRAM,bigbss=BIGRAM,bigdata=BIGRAM -pbss=RAM \
+ -pidata=CODE,irdata=CODE,ibigdata=CODE,ifardata=CODE -prparam=COMRAM \
+ C:\Users\_prossn\AppData\Local\Temp\s3s8.obj \
+ dist/default/production\src.production.obj
+
+Object code version is 3.11
+
+Machine type is 18F44K22
+
+Call graph: (short form)
+
+
+
+
+ Name Link Load Length Selector Space Scale
+C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+ init 0 0 4 0 0
+ idloc 200000 200000 8 200000 0
+ config 300000 300000 E 300000 0
+dist/default/production\src.production.obj
+ text1 3FE8 3FE8 18 1FF4 0
+ text0 3FDC 3FDC 6 1FEE 0
+ cinit 3FE2 3FE2 6 1FF1 0
+
+TOTAL Name Link Load Length Space
+ CLASS STACK
+
+ CLASS CODE
+ init 0 0 4 0
+ text1 3FE8 3FE8 18 0
+ text0 3FDC 3FDC 6 0
+ cinit 3FE2 3FE2 6 0
+
+ CLASS CONST
+
+ CLASS SMALLCONST
+
+ CLASS MEDIUMCONST
+
+ CLASS COMRAM
+
+ CLASS ABS1
+
+ CLASS BIGRAM
+
+ CLASS RAM
+
+ CLASS BANK0
+
+ CLASS BANK1
+
+ CLASS BANK2
+
+ CLASS SFR
+
+ CLASS FARRAM
+
+ CLASS CONFIG
+ config 300000 300000 E 0
+
+ CLASS IDLOC
+ idloc 200000 200000 8 0
+
+ CLASS EEDATA
+
+
+
+SEGMENTS Name Load Length Top Selector Space Class
+
+ reset_vec 000000 000004 000004 0 0 CODE
+ text0 003FDC 000006 003FE2 1FEE 0 CODE
+ cinit 003FE2 000006 003FE8 1FF1 0 CODE
+ text1 003FE8 000018 004000 1FF4 0 CODE
+ idloc 200000 000008 200008 200000 0 IDLOC
+ config 300000 00000E 30000E 300000 0 CONFIG
+
+
+UNUSED ADDRESS RANGES
+
+ Name Unused Largest block Delta
+ BANK0 000060-0000FF A0
+ BANK1 000100-0001FF 100
+ BANK2 000200-0002FF 100
+ BIGRAM 000001-0002FF 2FF
+ CODE 000004-003FDB 3FD8
+ COMRAM 000001-00005F 5F
+ CONST 000004-003FDB 3FD8
+ EEDATA F00000-F000FF 100
+ MEDIUMCONST 000300-003FDB 3CDC
+ RAM 000060-0002FF 100
+ SFR 000F38-000FFF 28
+ SMALLCONST 000300-003FDB 100
+ STACK 000060-0002FF 2A0
+
+ Symbol Table
+
+_BAUDCONbits (abs) 000FB8
+_RCIF (abs) 007CF5
+_RCREG (abs) 000FAE
+_RCSTAbits (abs) 000FAB
+_SPBRG (abs) 000FAF
+_TRISC6 (abs) 007CA6
+_TRISC7 (abs) 007CA7
+_TXIF (abs) 007CF4
+_TXREG (abs) 000FAD
+_TXSTAbits (abs) 000FAC
+__CFG_BOREN$SBORDIS (abs) 000000
+__CFG_BORV$190 (abs) 000000
+__CFG_CCP2MX$PORTC1 (abs) 000000
+__CFG_CCP3MX$PORTB5 (abs) 000000
+__CFG_CP0$OFF (abs) 000000
+__CFG_CP1$OFF (abs) 000000
+__CFG_CPB$OFF (abs) 000000
+__CFG_CPD$OFF (abs) 000000
+__CFG_EBTR0$OFF (abs) 000000
+__CFG_EBTR1$OFF (abs) 000000
+__CFG_EBTRB$OFF (abs) 000000
+__CFG_FCMEN$OFF (abs) 000000
+__CFG_FOSC$ECHPIO6 (abs) 000000
+__CFG_HFOFST$ON (abs) 000000
+__CFG_IESO$OFF (abs) 000000
+__CFG_LVP$ON (abs) 000000
+__CFG_MCLRE$EXTMCLR (abs) 000000
+__CFG_P2BMX$PORTD2 (abs) 000000
+__CFG_PBADEN$ON (abs) 000000
+__CFG_PLLCFG$OFF (abs) 000000
+__CFG_PRICLKEN$ON (abs) 000000
+__CFG_PWRTEN$OFF (abs) 000000
+__CFG_STVREN$ON (abs) 000000
+__CFG_T3CMX$PORTC0 (abs) 000000
+__CFG_WDTEN$ON (abs) 000000
+__CFG_WDTPS$32768 (abs) 000000
+__CFG_WRT0$OFF (abs) 000000
+__CFG_WRT1$OFF (abs) 000000
+__CFG_WRTB$OFF (abs) 000000
+__CFG_WRTC$OFF (abs) 000000
+__CFG_WRTD$OFF (abs) 000000
+__CFG_XINST$OFF (abs) 000000
+__HRAM (abs) 000000
+__Habs1 abs1 000000
+__Hbank0 bank0 000000
+__Hbank1 bank1 000000
+__Hbank2 bank2 000000
+__Hbigbss bigbss 000000
+__Hbigdata bigdata 000000
+__Hbigram bigram 000000
+__Hbss bss 000000
+__Hcinit cinit 000000
+__Hclrtext clrtext 000000
+__Hcomram comram 000000
+__Hconfig config 30000E
+__Hconst const 000000
+__HcstackCOMRAM cstackCOMRAM 000000
+__Hdata data 000000
+__Heeprom_data eeprom_data 000000
+__Hfarbss farbss 000000
+__Hfardata fardata 000000
+__Hibigdata ibigdata 000000
+__Hidata idata 000000
+__Hidloc idloc 200008
+__Hifardata ifardata 000000
+__Hinit init 000004
+__Hintcode intcode 000000
+__Hintcode_body intcode_body 000000
+__Hintcodelo intcodelo 000000
+__Hintentry intentry 000000
+__Hintret intret 000000
+__Hintsave_regs intsave_regs 000000
+__Hirdata irdata 000000
+__Hmediumconst mediumconst 000000
+__HnvFARRAM nvFARRAM 000000
+__Hnvbit nvbit 000000
+__Hnvrram nvrram 000000
+__Hparam rparam 000000
+__Hpowerup powerup 000000
+__Hram ram 000000
+__Hramtop ramtop 000300
+__Hrbit rbit 000000
+__Hrbss rbss 000000
+__Hrdata rdata 000000
+__Hreset_vec reset_vec 000000
+__Hrparam rparam 000000
+__Hsfr sfr 000000
+__Hsmallconst smallconst 000000
+__Hspace_0 (abs) 30000E
+__Hspace_1 (abs) 000000
+__Hspace_2 (abs) 000000
+__Hstack stack 000000
+__Hstruct struct 000000
+__Htemp temp 000000
+__Htext text 000000
+__Htext0 text0 000000
+__Htext1 text1 000000
+__LRAM (abs) 000001
+__Labs1 abs1 000000
+__Lbank0 bank0 000000
+__Lbank1 bank1 000000
+__Lbank2 bank2 000000
+__Lbigbss bigbss 000000
+__Lbigdata bigdata 000000
+__Lbigram bigram 000000
+__Lbss bss 000000
+__Lcinit cinit 000000
+__Lclrtext clrtext 000000
+__Lcomram comram 000000
+__Lconfig config 300000
+__Lconst const 000000
+__LcstackCOMRAM cstackCOMRAM 000000
+__Ldata data 000000
+__Leeprom_data eeprom_data 000000
+__Lfarbss farbss 000000
+__Lfardata fardata 000000
+__Libigdata ibigdata 000000
+__Lidata idata 000000
+__Lidloc idloc 200000
+__Lifardata ifardata 000000
+__Linit init 000000
+__Lintcode intcode 000000
+__Lintcode_body intcode_body 000000
+__Lintcodelo intcodelo 000000
+__Lintentry intentry 000000
+__Lintret intret 000000
+__Lintsave_regs intsave_regs 000000
+__Lirdata irdata 000000
+__Lmediumconst mediumconst 000000
+__LnvFARRAM nvFARRAM 000000
+__Lnvbit nvbit 000000
+__Lnvrram nvrram 000000
+__Lparam rparam 000000
+__Lpowerup powerup 000000
+__Lram ram 000000
+__Lramtop ramtop 000300
+__Lrbit rbit 000000
+__Lrbss rbss 000000
+__Lrdata rdata 000000
+__Lreset_vec reset_vec 000000
+__Lrparam rparam 000000
+__Lsfr sfr 000000
+__Lsmallconst smallconst 000000
+__Lspace_0 (abs) 000000
+__Lspace_1 (abs) 000000
+__Lspace_2 (abs) 000000
+__Lstack stack 000000
+__Lstruct struct 000000
+__Ltemp temp 000000
+__Ltext text 000000
+__Ltext0 text0 000000
+__Ltext1 text1 000000
+__S0 (abs) 30000E
+__S1 (abs) 000000
+__S2 (abs) 000000
+___inthi_sp stack 000000
+___intlo_sp stack 000000
+___param_bank (abs) 000000
+___rparam_used (abs) 000001
+___sp stack 000000
+__accesstop (abs) 000060
+__activetblptr (abs) 000000
+__end_of__initialization cinit 003FE2
+__end_of_eusart_init text1 004000
+__end_of_main text0 003FE2
+__initialization cinit 003FE2
+__mediumconst mediumconst 000000
+__pcinit cinit 003FE2
+__pcstackCOMRAM cstackCOMRAM 000000
+__ptext0 text0 003FDC
+__ptext1 text1 003FE8
+__ramtop ramtop 000300
+__size_of_eusart_init (abs) 000000
+__size_of_main (abs) 000000
+__smallconst smallconst 000000
+_eusart_init text1 003FE8
+_main text0 003FDC
+end_of_initialization cinit 003FE2
+intlevel0 text 000000
+intlevel1 text 000000
+intlevel2 text 000000
+intlevel3 text 000000
+stackhi (abs) 0002FF
+stacklo (abs) 000060
+start init 000000
+start_initialization cinit 003FE2
+
+
+FUNCTION INFORMATION:
+
+ *************** function _main *****************
+ Defined at:
+ line 83 in file "main.c"
+ Parameters: Size Location Type
+ None
+ Auto vars: Size Location Type
+ None
+ Return value: Size Location Type
+ 1 wreg void
+ Registers used:
+ wreg, status,2, cstack
+ Tracked objects:
+ On entry :
+ On exit :
+ Unchanged:
+ Data sizes: COMRAM BANK0 BANK1 BANK2
+ Params: 0 0 0 0
+ Locals: 0 0 0 0
+ Temps: 0 0 0 0
+ Totals: 0 0 0 0
+Total ram usage: 0 bytes
+ Hardware stack levels required when called: 1
+ This function calls:
+ _eusart_init
+ This function is called by:
+ Startup code after reset
+ This function uses a non-reentrant model
+
+
+ *************** function _eusart_init *****************
+ Defined at:
+ line 4 in file "rs232.c"
+ Parameters: Size Location Type
+ None
+ Auto vars: Size Location Type
+ None
+ Return value: Size Location Type
+ 1 wreg void
+ Registers used:
+ wreg, status,2
+ Tracked objects:
+ On entry :
+ On exit :
+ Unchanged:
+ Data sizes: COMRAM BANK0 BANK1 BANK2
+ Params: 0 0 0 0
+ Locals: 0 0 0 0
+ Temps: 0 0 0 0
+ Totals: 0 0 0 0
+Total ram usage: 0 bytes
+ Hardware stack levels used: 1
+ This function calls:
+ Nothing
+ This function is called by:
+ _main
+ This function uses a non-reentrant model
+
+
+
+MODULE INFORMATION
+
+Module Function Class Link Load Size
+rs232.c
+ _eusart_init CODE 3FE8 0000 25
+
+rs232.c estimated size: 25
+
+shared
+ __initialization CODE 3FE2 0000 1
+
+shared estimated size: 1
+
+main.c
+ _main CODE 3FDC 0000 7
+
+main.c estimated size: 7
+