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-rw-r--r--src/dist/default/production/src.production.sym220
1 files changed, 220 insertions, 0 deletions
diff --git a/src/dist/default/production/src.production.sym b/src/dist/default/production/src.production.sym
new file mode 100644
index 0000000..ebb58d4
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+++ b/src/dist/default/production/src.production.sym
@@ -0,0 +1,220 @@
+__CFG_XINST$OFF 0 0 ABS 0
+__size_of_eusart_init 0 0 ABS 0
+__S0 30000E 0 ABS 0
+__S1 0 0 ABS 0
+__S2 0 0 ABS 0
+__Hintentry 0 0 ABS 0
+__Lintentry 0 0 ABS 0
+__CFG_PLLCFG$OFF 0 0 ABS 0
+__CFG_WDTEN$ON 0 0 ABS 0
+_RCIF 7CF5 0 ABS 0
+_TXIF 7CF4 0 ABS 0
+_main 3FDC 0 CODE 0
+___sp 0 0 STACK 2
+start 0 0 CODE 0
+_RCREG FAE 0 ABS 0
+_TXREG FAD 0 ABS 0
+_SPBRG FAF 0 ABS 0
+__Hirdata 0 0 CODE 0
+__Lirdata 0 0 CODE 0
+__HRAM 0 0 ABS 0
+__LRAM 1 0 ABS 0
+__CFG_WDTPS$32768 0 0 ABS 0
+__Hconfig 30000E 0 CONFIG 0
+__Lconfig 300000 0 CONFIG 0
+__Hbigram 0 0 ABS 0
+__Lbigram 0 0 ABS 0
+__Hrparam 0 0 COMRAM 1
+__Lrparam 0 0 COMRAM 1
+__Hram 0 0 ABS 0
+__Lram 0 0 ABS 0
+__Hcomram 0 0 ABS 0
+__Lcomram 0 0 ABS 0
+__Hsfr 0 0 ABS 0
+__Lsfr 0 0 ABS 0
+__Hbss 0 0 RAM 1
+__CFG_STVREN$ON 0 0 ABS 0
+__Lbss 0 0 RAM 1
+___param_bank 0 0 ABS 0
+__Hnvrram 0 0 COMRAM 1
+__Lnvrram 0 0 COMRAM 1
+_TRISC6 7CA6 0 ABS 0
+_TRISC7 7CA7 0 ABS 0
+__Heeprom_data 0 0 EEDATA 0
+__Leeprom_data 0 0 EEDATA 0
+__Hintsave_regs 0 0 BIGRAM 1
+__Lintsave_regs 0 0 BIGRAM 1
+__Hbigbss 0 0 BIGRAM 1
+__Lbigbss 0 0 BIGRAM 1
+__Hintret 0 0 ABS 0
+__Lintret 0 0 ABS 0
+__Hramtop 300 0 RAM 0
+__Lramtop 300 0 RAM 0
+__Hstruct 0 0 COMRAM 1
+__Lstruct 0 0 COMRAM 1
+__Hbigdata 0 0 BIGRAM 1
+__Lbigdata 0 0 BIGRAM 1
+__Hmediumconst 0 0 MEDIUMCONST 0
+__Lmediumconst 0 0 MEDIUMCONST 0
+__Hfarbss 0 0 FARRAM 0
+__Lfarbss 0 0 FARRAM 0
+__Hintcode 0 0 CODE 0
+__Lintcode 0 0 CODE 0
+__Hfardata 0 0 FARRAM 0
+__Lfardata 0 0 FARRAM 0
+__Habs1 0 0 ABS 0
+__Labs1 0 0 ABS 0
+__CFG_EBTR0$OFF 0 0 ABS 0
+__CFG_FOSC$ECHPIO6 0 0 ABS 0
+__HnvFARRAM 0 0 FARRAM 0
+__LnvFARRAM 0 0 FARRAM 0
+__CFG_EBTR1$OFF 0 0 ABS 0
+__CFG_CCP2MX$PORTC1 0 0 ABS 0
+__CFG_CCP3MX$PORTB5 0 0 ABS 0
+__Hdata 0 0 ABS 0
+__Ldata 0 0 ABS 0
+stackhi 2FF 0 ABS 0
+__Htemp 0 0 COMRAM 1
+__Ltemp 0 0 COMRAM 1
+stacklo 60 0 ABS 0
+__Hrbit 0 0 COMRAM 1
+__Lrbit 0 0 COMRAM 1
+__Hinit 4 0 CODE 0
+__Linit 0 0 CODE 0
+__Hintcodelo 0 0 CODE 0
+__Lintcodelo 0 0 CODE 0
+__Hrbss 0 0 COMRAM 1
+__end_of_main 3FE2 0 CODE 0
+__Lrbss 0 0 COMRAM 1
+__Htext 0 0 ABS 0
+__Ltext 0 0 ABS 0
+__CFG_LVP$ON 0 0 ABS 0
+end_of_initialization 3FE2 0 CODE 0
+_RCSTAbits FAB 0 ABS 0
+_TXSTAbits FAC 0 ABS 0
+__Hibigdata 0 0 CODE 0
+__Libigdata 0 0 CODE 0
+__Hifardata 0 0 CODE 0
+__Lifardata 0 0 CODE 0
+__Hbank0 0 0 ABS 0
+__Lbank0 0 0 ABS 0
+__Hbank1 0 0 ABS 0
+__Lbank1 0 0 ABS 0
+__Hbank2 0 0 ABS 0
+__Lbank2 0 0 ABS 0
+__Hpowerup 0 0 CODE 0
+__Lpowerup 0 0 CODE 0
+__Htext0 0 0 ABS 0
+__Ltext0 0 0 ABS 0
+__Htext1 0 0 ABS 0
+__Ltext1 0 0 ABS 0
+__ptext0 3FDC 0 CODE 0
+__ptext1 3FE8 0 CODE 0
+__CFG_P2BMX$PORTD2 0 0 ABS 0
+__CFG_T3CMX$PORTC0 0 0 ABS 0
+__Hclrtext 0 0 ABS 0
+__Lclrtext 0 0 ABS 0
+__CFG_HFOFST$ON 0 0 ABS 0
+__end_of__initialization 3FE2 0 CODE 0
+__CFG_PRICLKEN$ON 0 0 ABS 0
+_BAUDCONbits FB8 0 ABS 0
+___rparam_used 1 0 ABS 0
+__Hidata 0 0 CODE 0
+__Lidata 0 0 CODE 0
+__Hrdata 0 0 COMRAM 1
+__Lrdata 0 0 COMRAM 1
+_eusart_init 3FE8 0 CODE 0
+__Hidloc 200008 0 IDLOC 0
+__Lidloc 200000 0 IDLOC 0
+__CFG_PWRTEN$OFF 0 0 ABS 0
+__Hstack 0 0 STACK 2
+__Lstack 0 0 STACK 2
+__Hparam 0 0 COMRAM 1
+__Lparam 0 0 COMRAM 1
+__Hspace_0 30000E 0 ABS 0
+__HcstackCOMRAM 0 0 ABS 0
+__Lspace_0 0 0 ABS 0
+__LcstackCOMRAM 0 0 ABS 0
+__pcstackCOMRAM 0 0 COMRAM 1
+__Hspace_1 0 0 ABS 0
+__Lspace_1 0 0 ABS 0
+__Hsmallconst 0 0 SMALLCONST 0
+__Lsmallconst 0 0 SMALLCONST 0
+__Hspace_2 0 0 ABS 0
+__Lspace_2 0 0 ABS 0
+__Hnvbit 0 0 COMRAM 1
+__Lnvbit 0 0 COMRAM 1
+__Hcinit 0 0 ABS 0
+__Lcinit 0 0 ABS 0
+__pcinit 3FE2 0 CODE 0
+__CFG_EBTRB$OFF 0 0 ABS 0
+__ramtop 300 0 RAM 0
+__mediumconst 0 0 MEDIUMCONST 0
+__size_of_main 0 0 ABS 0
+__Hconst 0 0 CONST 0
+__Lconst 0 0 CONST 0
+__CFG_WRT0$OFF 0 0 ABS 0
+__CFG_WRT1$OFF 0 0 ABS 0
+__CFG_MCLRE$EXTMCLR 0 0 ABS 0
+__CFG_FCMEN$OFF 0 0 ABS 0
+___inthi_sp 0 0 STACK 2
+___intlo_sp 0 0 STACK 2
+__CFG_CP0$OFF 0 0 ABS 0
+__smallconst 0 0 SMALLCONST 0
+__CFG_CP1$OFF 0 0 ABS 0
+__Hreset_vec 0 0 CODE 0
+__Lreset_vec 0 0 CODE 0
+__CFG_BORV$190 0 0 ABS 0
+__accesstop 60 0 ABS 0
+__Hintcode_body 0 0 ABS 0
+__Lintcode_body 0 0 ABS 0
+__CFG_PBADEN$ON 0 0 ABS 0
+intlevel0 0 0 CODE 0
+intlevel1 0 0 CODE 0
+__CFG_WRTB$OFF 0 0 ABS 0
+intlevel2 0 0 CODE 0
+intlevel3 0 0 CODE 0
+__CFG_WRTC$OFF 0 0 ABS 0
+__end_of_eusart_init 4000 0 CODE 0
+__CFG_WRTD$OFF 0 0 ABS 0
+__CFG_CPB$OFF 0 0 ABS 0
+__CFG_CPD$OFF 0 0 ABS 0
+start_initialization 3FE2 0 CODE 0
+__CFG_BOREN$SBORDIS 0 0 ABS 0
+__CFG_IESO$OFF 0 0 ABS 0
+__initialization 3FE2 0 CODE 0
+__activetblptr 0 0 ABS 0
+%segments
+reset_vec 0 3 CODE 0 0
+config 300000 30000D CONFIG 300000 0
+idloc 200000 200007 IDLOC 200000 0
+text1 3FE8 3FFF CODE 3FE8 0
+cinit 3FE2 3FE7 CODE 3FE2 0
+text0 3FDC 3FE1 CODE 3FDC 0
+%locals
+dist/default/production\src.production.obj
+C:\Program Files\Microchip\xc8\v1.44\include\pic18f44k22.h
+C:\Users\_prossn\AppData\Local\Temp\s3s8.
+1144 3FE2 0 CODE 0
+1146 3FE2 0 CODE 0
+1149 3FE2 0 CODE 0
+1155 3FE2 0 CODE 0
+1157 3FE2 0 CODE 0
+1158 3FE4 0 CODE 0
+main.c
+83 3FDC 0 CODE 0
+85 3FDC 0 CODE 0
+88 3FE0 0 CODE 0
+rs232.c
+4 3FE8 0 CODE 0
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+8 3FEA 0 CODE 0
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