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authorNao Pross <naopross@thearcway.org>2017-05-18 17:10:19 +0200
committerNao Pross <naopross@thearcway.org>2017-05-18 17:10:19 +0200
commit28222d73027a1879a5c39e766c1a835e069d1341 (patch)
treecbb16c97c7d64fd7c0d2d24e860ff47c7df31659 /hw-altium/History/MainBoard.~(317).PcbDoc.Zip
parentwiring for CTC (U8) to address bus and data bus (diff)
downloadz80uPC-28222d73027a1879a5c39e766c1a835e069d1341.tar.gz
z80uPC-28222d73027a1879a5c39e766c1a835e069d1341.zip
new traces for cpu signals and for high address to the MMU / addr decoder
there are also many other minor changes to connect various wires
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