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authorNao Pross <naopross@thearcway.org>2018-10-30 11:41:24 +0100
committerNao Pross <naopross@thearcway.org>2018-10-30 11:41:24 +0100
commit43be150dc6e84f6f6eeb071cd3cdb7fc21125d60 (patch)
tree541fd3d690c1bdfd7b68d684029a400b80f4aa06 /hw-altium/Project Logs for z80uPC
parentAdd datasheets for ATmega328 and 74LS259 (diff)
downloadz80uPC-43be150dc6e84f6f6eeb071cd3cdb7fc21125d60.tar.gz
z80uPC-43be150dc6e84f6f6eeb071cd3cdb7fc21125d60.zip
Move sw to sw-old and hw to hw-altium, add kicad files
Diffstat (limited to 'hw-altium/Project Logs for z80uPC')
-rw-r--r--hw-altium/Project Logs for z80uPC/BusViewer SCH ECO 19.05.2017 14-39-07.LOG0
-rw-r--r--hw-altium/Project Logs for z80uPC/BusViewer SCH ECO 26.04.2017 16-26-06.LOG5
-rw-r--r--hw-altium/Project Logs for z80uPC/BusViewer SCH ECO 31.03.2017 14-10-14.LOG13
-rw-r--r--hw-altium/Project Logs for z80uPC/IODevices SCH ECO 16.03.2017 16-58-15.LOG10
-rw-r--r--hw-altium/Project Logs for z80uPC/IODevices SCH ECO 17.03.2017 09-34-11.LOG18
-rw-r--r--hw-altium/Project Logs for z80uPC/IODevices SCH ECO 20.03.2017 08-17-19.LOG4
-rw-r--r--hw-altium/Project Logs for z80uPC/IODevices SCH ECO 31.03.2017 14-10-14.LOG20
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 05.05.2017 09-12-23.LOG4
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 05.05.2017 09-41-08.LOG1
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 09-42-04.LOG21
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 13-27-31.LOG6
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 14-47-33.LOG150
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 16-25-23.LOG716
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 16-44-14.LOG2
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 13.04.2017 11-24-24.LOG824
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 13.04.2017 11-26-34.LOG823
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 08-48-38.LOG50
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 11-16-39.LOG8
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 11-19-08.LOG20
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 15-15-57.LOG4
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 15-17-08.LOG1
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-01.LOG0
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-42.LOG11
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 10-58-34.LOG768
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-05-38.LOG801
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-14-26.LOG801
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-51-56.LOG802
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-54-08.LOG802
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 13-41-49.LOG802
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-19-39.LOG802
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-21-23.LOG802
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-23-38.LOG802
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-24-09.LOG802
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-25-00.LOG802
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 15-07-53.LOG798
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 15-16-56.LOG800
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-23-33.LOG73
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-28-33.LOG706
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-37-23.LOG102
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-46-27.LOG51
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 11-02-01.LOG1
-rw-r--r--hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 26.04.2017 16-27-14.LOG4
-rw-r--r--hw-altium/Project Logs for z80uPC/MainSheet SCH ECO 20.03.2017 08-17-19.LOG5
-rw-r--r--hw-altium/Project Logs for z80uPC/MainSheet SCH ECO 31.03.2017 14-10-14.LOG6
-rw-r--r--hw-altium/Project Logs for z80uPC/Peripherals SCH ECO 31.03.2017 14-10-14.LOG32
-rw-r--r--hw-altium/Project Logs for z80uPC/Power SCH ECO 20.03.2017 08-17-19.LOG4
46 files changed, 14079 insertions, 0 deletions
diff --git a/hw-altium/Project Logs for z80uPC/BusViewer SCH ECO 19.05.2017 14-39-07.LOG b/hw-altium/Project Logs for z80uPC/BusViewer SCH ECO 19.05.2017 14-39-07.LOG
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/BusViewer SCH ECO 19.05.2017 14-39-07.LOG
diff --git a/hw-altium/Project Logs for z80uPC/BusViewer SCH ECO 26.04.2017 16-26-06.LOG b/hw-altium/Project Logs for z80uPC/BusViewer SCH ECO 26.04.2017 16-26-06.LOG
new file mode 100644
index 0000000..c57b9fd
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/BusViewer SCH ECO 26.04.2017 16-26-06.LOG
@@ -0,0 +1,5 @@
+Change Component Footprint: Designator=P3 Old Footprint=HDR2X5 New Footprint=MHDR2X5
+Add Pin To Net: Pin=S1-1 Old Net=NetS1_1 New Net=CLK
+Add Pin To Net: Pin=S1-3 Old Net=NetS1_3 New Net=CLK3
+Add Pin To Net: Pin=S1-4 Old Net=NetS1_4 New Net=CLK2
+Add Pin To Net: Pin=S1-5 Old Net=NetS1_5 New Net=CLK1
diff --git a/hw-altium/Project Logs for z80uPC/BusViewer SCH ECO 31.03.2017 14-10-14.LOG b/hw-altium/Project Logs for z80uPC/BusViewer SCH ECO 31.03.2017 14-10-14.LOG
new file mode 100644
index 0000000..8852c47
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/BusViewer SCH ECO 31.03.2017 14-10-14.LOG
@@ -0,0 +1,13 @@
+Change Component Designator: Old Designator=DS? New Designator=DS1
+Change Component Designator: Old Designator=DS? New Designator=DS2
+Change Component Designator: Old Designator=DS? New Designator=DS3
+Change Component Designator: Old Designator=DS? New Designator=DS4
+Change Component Designator: Old Designator=DS? New Designator=DS5
+Change Component Designator: Old Designator=DS? New Designator=DS6
+Change Component Designator: Old Designator=S? New Designator=S3
+Change Component Designator: Old Designator=U? New Designator=U10
+Change Component Designator: Old Designator=U? New Designator=U11
+Change Component Designator: Old Designator=U? New Designator=U12
+Change Component Designator: Old Designator=U? New Designator=U13
+Change Component Designator: Old Designator=U? New Designator=U14
+Change Component Designator: Old Designator=U? New Designator=U15
diff --git a/hw-altium/Project Logs for z80uPC/IODevices SCH ECO 16.03.2017 16-58-15.LOG b/hw-altium/Project Logs for z80uPC/IODevices SCH ECO 16.03.2017 16-58-15.LOG
new file mode 100644
index 0000000..2462d21
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/IODevices SCH ECO 16.03.2017 16-58-15.LOG
@@ -0,0 +1,10 @@
+Replace Part * MAX214 in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with MAX214 from z80uPC.SCHLIB
+Replace Part C? Cap2 in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Cap2 from Miscellaneous Devices.IntLib
+Replace Part C? Cap2 in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Cap2 from Miscellaneous Devices.IntLib
+Replace Part C? Cap in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Cap from z80uPC.SCHLIB
+Replace Part C? Cap in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Cap from z80uPC.SCHLIB
+Replace Part J? D Connector 9 in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with D Connector 9 from Miscellaneous Connectors.IntLib
+Replace Part R?? Res2 in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Res2 from z80uPC.SCHLIB
+Replace Part R?? Res2 in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Res2 from z80uPC.SCHLIB
+Replace Part U? TL16C550C in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with TL16C550C from z80uPC.SCHLIB
+Replace Part Y? XTAL in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with XTAL from Miscellaneous Devices.IntLib
diff --git a/hw-altium/Project Logs for z80uPC/IODevices SCH ECO 17.03.2017 09-34-11.LOG b/hw-altium/Project Logs for z80uPC/IODevices SCH ECO 17.03.2017 09-34-11.LOG
new file mode 100644
index 0000000..659c985
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/IODevices SCH ECO 17.03.2017 09-34-11.LOG
@@ -0,0 +1,18 @@
+Replace Part * MAX214 in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with MAX214 from z80uPC.SCHLIB
+Replace Part C? Cap in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Cap from z80uPC.SCHLIB
+Replace Part C? Cap in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Cap from z80uPC.SCHLIB
+Replace Part C? Cap in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Cap from z80uPC.SCHLIB
+Replace Part C? Cap in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Cap from z80uPC.SCHLIB
+Replace Part C? Cap in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Cap from z80uPC.SCHLIB
+Replace Part C? Cap in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Cap from z80uPC.SCHLIB
+Replace Part J? D Connector 9 in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with D Connector 9 from Miscellaneous Connectors.IntLib
+Replace Part P? MHDR1X10 in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with MHDR1X10 from Miscellaneous Connectors.IntLib
+Replace Part P? MHDR1X10 in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with MHDR1X10 from Miscellaneous Connectors.IntLib
+Replace Part P? MHDR1X10 in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with MHDR1X10 from Miscellaneous Connectors.IntLib
+Replace Part R?? Res2 in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Res2 from z80uPC.SCHLIB
+Replace Part R?? Res2 in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Res2 from z80uPC.SCHLIB
+Replace Part S? SW-SPDT in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with SW-SPDT from Miscellaneous Devices.IntLib
+Replace Part U9 Z84C2004PEC in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Z84C2004PEC from Zilog Peripheral Interface.IntLib
+Replace Part U10 Z84C3004PEC in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with Z84C3004PEC from Zilog Logic Counter.IntLib
+Replace Part U? TL16C550C in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with TL16C550C from z80uPC.SCHLIB
+Replace Part Y? XTAL in F:\School\Lab3\projects\z80uPC\hw\IODevices.SchDoc with XTAL from Miscellaneous Devices.IntLib
diff --git a/hw-altium/Project Logs for z80uPC/IODevices SCH ECO 20.03.2017 08-17-19.LOG b/hw-altium/Project Logs for z80uPC/IODevices SCH ECO 20.03.2017 08-17-19.LOG
new file mode 100644
index 0000000..e745c18
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/IODevices SCH ECO 20.03.2017 08-17-19.LOG
@@ -0,0 +1,4 @@
+Change Component Designator: Old Designator=R?? New Designator=R?
+Change Component Designator: Old Designator=R?? New Designator=R?
+Change Component Designator: Old Designator=U9 New Designator=U?
+Change Component Designator: Old Designator=U10 New Designator=U?
diff --git a/hw-altium/Project Logs for z80uPC/IODevices SCH ECO 31.03.2017 14-10-14.LOG b/hw-altium/Project Logs for z80uPC/IODevices SCH ECO 31.03.2017 14-10-14.LOG
new file mode 100644
index 0000000..e962a7a
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/IODevices SCH ECO 31.03.2017 14-10-14.LOG
@@ -0,0 +1,20 @@
+Change Component Designator: Old Designator=C? New Designator=C1
+Change Component Designator: Old Designator=C? New Designator=C2
+Change Component Designator: Old Designator=C? New Designator=C3
+Change Component Designator: Old Designator=C? New Designator=C4
+Change Component Designator: Old Designator=C? New Designator=C5
+Change Component Designator: Old Designator=C? New Designator=C6
+Change Component Designator: Old Designator=J? New Designator=J1
+Change Component Designator: Old Designator=P? New Designator=P1
+Change Component Designator: Old Designator=P? New Designator=P2
+Change Component Designator: Old Designator=P? New Designator=P3
+Change Component Designator: Old Designator=P? New Designator=P4
+Change Component Designator: Old Designator=P? New Designator=P5
+Change Component Designator: Old Designator=R? New Designator=R1
+Change Component Designator: Old Designator=R? New Designator=R2
+Change Component Designator: Old Designator=S? New Designator=S2
+Change Component Designator: Old Designator=U? New Designator=U6
+Change Component Designator: Old Designator=U? New Designator=U7
+Change Component Designator: Old Designator=U? New Designator=U8
+Change Component Designator: Old Designator=U? New Designator=U9
+Change Component Designator: Old Designator=Y? New Designator=Y1
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 05.05.2017 09-12-23.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 05.05.2017 09-12-23.LOG
new file mode 100644
index 0000000..e593aea
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 05.05.2017 09-12-23.LOG
@@ -0,0 +1,4 @@
+Change Component Footprint: Designator=P1 Old Footprint=MHDR2X5 New Footprint=HDR5x2_SOCK
+Change Component Footprint: Designator=P4 Old Footprint=MHDR2X5 New Footprint=HDR5x2_SOCK
+Change Component Footprint: Designator=P5 Old Footprint=MHDR2X5 New Footprint=HDR5x2_SOCK
+Change Component Footprint: Designator=P7 Old Footprint=MHDR2X5 New Footprint=HDR5x2_SOCK
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 05.05.2017 09-41-08.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 05.05.2017 09-41-08.LOG
new file mode 100644
index 0000000..3565d69
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 05.05.2017 09-41-08.LOG
@@ -0,0 +1 @@
+Change Component Footprint: Designator=P3 Old Footprint=HDR2X5 New Footprint=HDR5x2_SOCK
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 09-42-04.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 09-42-04.LOG
new file mode 100644
index 0000000..fb7a000
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 09-42-04.LOG
@@ -0,0 +1,21 @@
+Removed Pin From Net: NetName=A12 Pin=U4-18
+Removed Pin From Net: NetName=A13 Pin=U4-19
+Removed Pin From Net: NetName=A14 Pin=U4-20
+Removed Pin From Net: NetName=A15 Pin=U4-21
+Added Pin To Net: NetName=A15 Pin=U4-36
+Added Pin To Net: NetName=A14 Pin=U4-37
+Added Pin To Net: NetName=A13 Pin=U4-38
+Added Pin To Net: NetName=A12 Pin=U4-39
+Added Pin To Net: NetName=D3 Pin=U4-40
+Added Pin To Net: NetName=D2 Pin=U4-41
+Added Pin To Net: NetName=D1 Pin=U4-42
+Added Pin To Net: NetName=D0 Pin=U4-43
+Added Pin To Net: NetName=MMU_A12 Pin=U4-18
+Added Net: Name=MMU_A12
+Added Pin To Net: NetName=MMU_A13 Pin=U4-19
+Added Net: Name=MMU_A13
+Added Pin To Net: NetName=MMU_A14 Pin=U4-20
+Added Net: Name=MMU_A14
+Added Pin To Net: NetName=MMU_A15 Pin=U4-21
+Added Net: Name=MMU_A15
+Added Member To Class: ClassName=IODevices Member=Component P2 Header 8X2
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 13-27-31.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 13-27-31.LOG
new file mode 100644
index 0000000..3cd6dbe
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 13-27-31.LOG
@@ -0,0 +1,6 @@
+Removed Pin From Net: NetName=A13 Pin=U1-3
+Removed Pin From Net: NetName=A14 Pin=U1-4
+Removed Pin From Net: NetName=A15 Pin=U1-5
+Added Pin To Net: NetName=MMU_A13 Pin=U1-3
+Added Pin To Net: NetName=MMU_A14 Pin=U1-4
+Added Pin To Net: NetName=MMU_A15 Pin=U1-5
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 14-47-33.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 14-47-33.LOG
new file mode 100644
index 0000000..e3b8427
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 14-47-33.LOG
@@ -0,0 +1,150 @@
+Added Pin To Net: NetName=NetDS1_1 Pin=DS1-1
+Added Pin To Net: NetName=NetDS1_2 Pin=DS1-2
+Added Pin To Net: NetName=DB9-5 Pin=DS1-3
+Added Pin To Net: NetName=NetDS1_4 Pin=DS1-4
+Added Pin To Net: NetName=NetDS1_6 Pin=DS1-6
+Added Pin To Net: NetName=NetDS1_7 Pin=DS1-7
+Added Pin To Net: NetName=DB9-5 Pin=DS1-8
+Added Pin To Net: NetName=NetDS1_9 Pin=DS1-9
+Added Pin To Net: NetName=NetDS1_10 Pin=DS1-10
+Added Pin To Net: NetName=NetDS2_1 Pin=DS2-1
+Added Pin To Net: NetName=NetDS2_2 Pin=DS2-2
+Added Pin To Net: NetName=DB9-5 Pin=DS2-3
+Added Pin To Net: NetName=NetDS2_4 Pin=DS2-4
+Added Pin To Net: NetName=NetDS2_6 Pin=DS2-6
+Added Pin To Net: NetName=NetDS2_7 Pin=DS2-7
+Added Pin To Net: NetName=DB9-5 Pin=DS2-8
+Added Pin To Net: NetName=NetDS2_9 Pin=DS2-9
+Added Pin To Net: NetName=NetDS2_10 Pin=DS2-10
+Added Pin To Net: NetName=NetDS3_1 Pin=DS3-1
+Added Pin To Net: NetName=NetDS3_2 Pin=DS3-2
+Added Pin To Net: NetName=DB9-5 Pin=DS3-3
+Added Pin To Net: NetName=NetDS3_4 Pin=DS3-4
+Added Pin To Net: NetName=NetDS3_6 Pin=DS3-6
+Added Pin To Net: NetName=NetDS3_7 Pin=DS3-7
+Added Pin To Net: NetName=DB9-5 Pin=DS3-8
+Added Pin To Net: NetName=NetDS3_9 Pin=DS3-9
+Added Pin To Net: NetName=NetDS3_10 Pin=DS3-10
+Added Pin To Net: NetName=NetDS4_1 Pin=DS4-1
+Added Pin To Net: NetName=NetDS4_2 Pin=DS4-2
+Added Pin To Net: NetName=DB9-5 Pin=DS4-3
+Added Pin To Net: NetName=NetDS4_4 Pin=DS4-4
+Added Pin To Net: NetName=NetDS4_6 Pin=DS4-6
+Added Pin To Net: NetName=NetDS4_7 Pin=DS4-7
+Added Pin To Net: NetName=DB9-5 Pin=DS4-8
+Added Pin To Net: NetName=NetDS4_9 Pin=DS4-9
+Added Pin To Net: NetName=NetDS4_10 Pin=DS4-10
+Added Pin To Net: NetName=NetDS5_1 Pin=DS5-1
+Added Pin To Net: NetName=NetDS5_2 Pin=DS5-2
+Added Pin To Net: NetName=DB9-5 Pin=DS5-3
+Added Pin To Net: NetName=NetDS5_4 Pin=DS5-4
+Added Pin To Net: NetName=NetDS5_6 Pin=DS5-6
+Added Pin To Net: NetName=NetDS5_7 Pin=DS5-7
+Added Pin To Net: NetName=DB9-5 Pin=DS5-8
+Added Pin To Net: NetName=NetDS5_9 Pin=DS5-9
+Added Pin To Net: NetName=NetDS5_10 Pin=DS5-10
+Added Pin To Net: NetName=NetDS6_1 Pin=DS6-1
+Added Pin To Net: NetName=NetDS6_2 Pin=DS6-2
+Added Pin To Net: NetName=DB9-5 Pin=DS6-3
+Added Pin To Net: NetName=NetDS6_4 Pin=DS6-4
+Added Pin To Net: NetName=NetDS6_6 Pin=DS6-6
+Added Pin To Net: NetName=NetDS6_7 Pin=DS6-7
+Added Pin To Net: NetName=DB9-5 Pin=DS6-8
+Added Pin To Net: NetName=NetDS6_9 Pin=DS6-9
+Added Pin To Net: NetName=NetDS6_10 Pin=DS6-10
+Added Pin To Net: NetName=NetDS1_1 Pin=U10-1
+Added Pin To Net: NetName=NetDS1_9 Pin=U10-2
+Added Pin To Net: NetName=NetDS1_10 Pin=U10-3
+Added Pin To Net: NetName=A0 Pin=U10-5
+Added Pin To Net: NetName=A1 Pin=U10-6
+Added Pin To Net: NetName=LE Pin=U10-7
+Added Pin To Net: NetName=DB9-5 Pin=U10-8
+Added Pin To Net: NetName=A2 Pin=U10-9
+Added Pin To Net: NetName=A3 Pin=U10-10
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 16-25-23.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 16-25-23.LOG
new file mode 100644
index 0000000..cb1509c
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 16-25-23.LOG
@@ -0,0 +1,716 @@
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+Added Member To Class: ClassName=MainSheet Member=Component U1 Z84C0004PEC
+Added Member To Class: ClassName=MainSheet Member=Component U2 M28C64-150P1
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+Added Member To Class: ClassName=MainSheet Member=Component U4 M4-32/32-15JC
+Added Member To Class: ClassName=MainSheet Member=Component U5 M28C64-150P1
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+Added Member To Class: ClassName=BusViewer Member=Component U11 MC14495
+Added Member To Class: ClassName=BusViewer Member=Component U12 MC14495
+Added Member To Class: ClassName=BusViewer Member=Component U13 MC14495
+Added Member To Class: ClassName=BusViewer Member=Component U14 MC14495
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+Added Member To Class: ClassName=Peripherals Member=Component U18 L7805ACV
+Added Member To Class: ClassName=IODevices Member=Component Y1 XTAL
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 16-44-14.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 16-44-14.LOG
new file mode 100644
index 0000000..f5b4866
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 08.05.2017 16-44-14.LOG
@@ -0,0 +1,2 @@
+Removed Pin From Net: NetName=A12 Pin=U1-2
+Added Pin To Net: NetName=MMU_A12 Pin=U1-2
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 13.04.2017 11-24-24.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 13.04.2017 11-24-24.LOG
new file mode 100644
index 0000000..5fcd88b
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 13.04.2017 11-24-24.LOG
@@ -0,0 +1,824 @@
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+Change Component Footprint: Designator=P1 Old Footprint=CNVME96 New Footprint=MHDR2X5
+Change Component Comment : Designator=P1 Old Comment=CNVME96 New Comment=MHDR1X10
+Added Component: Designator=C1(RAD-0.3)
+Added Component: Designator=C2(RAD-0.3)
+Added Component: Designator=C3(RAD-0.3)
+Added Component: Designator=C4(RAD-0.3)
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+Added Component: Designator=C13(RAD-0.3)
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+Added Component: Designator=C17(RAD-0.3)
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 13.04.2017 11-26-34.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 13.04.2017 11-26-34.LOG
new file mode 100644
index 0000000..7229c97
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 13.04.2017 11-26-34.LOG
@@ -0,0 +1,823 @@
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+Change Component Comment : Designator=P1 Old Comment=CNVME96 New Comment=MHDR1X10
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+Added Component: Designator=C2(RAD-0.3)
+Added Component: Designator=C3(RAD-0.3)
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+Added Component: Designator=C15(RAD-0.3)
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+Added Pin To Net: NetName=R\I\ Pin=P3-8
+Added Net: Name=R\I\
+Added Pin To Net: NetName=R\S\T\ Pin=C8-2
+Added Pin To Net: NetName=R\S\T\ Pin=D2-1
+Added Pin To Net: NetName=R\S\T\ Pin=P6-10
+Added Pin To Net: NetName=R\S\T\ Pin=R4-1
+Added Pin To Net: NetName=R\S\T\ Pin=S4-2
+Added Pin To Net: NetName=R\S\T\ Pin=U1-26
+Added Pin To Net: NetName=R\S\T\ Pin=U8-17
+Added Net: Name=R\S\T\
+Added Pin To Net: NetName=R\T\S\ Pin=P2-5
+Added Pin To Net: NetName=R\T\S\ Pin=P3-3
+Added Net: Name=R\T\S\
+Added Pin To Net: NetName=RXD Pin=P2-3
+Added Pin To Net: NetName=RXD Pin=P3-2
+Added Net: Name=RXD
+Added Pin To Net: NetName=TCK Pin=P7-2
+Added Pin To Net: NetName=TCK Pin=U4-13
+Added Net: Name=TCK
+Added Pin To Net: NetName=TDI Pin=P7-1
+Added Pin To Net: NetName=TDI Pin=U4-10
+Added Net: Name=TDI
+Added Pin To Net: NetName=TDO Pin=P7-4
+Added Pin To Net: NetName=TDO Pin=U4-35
+Added Net: Name=TDO
+Added Pin To Net: NetName=TMS Pin=P7-3
+Added Pin To Net: NetName=TMS Pin=U4-32
+Added Net: Name=TMS
+Added Pin To Net: NetName=TXD Pin=P2-1
+Added Pin To Net: NetName=TXD Pin=P3-1
+Added Net: Name=TXD
+Added Pin To Net: NetName=W\A\I\T\ Pin=P6-14
+Added Pin To Net: NetName=W\A\I\T\ Pin=U1-24
+Added Net: Name=W\A\I\T\
+Added Pin To Net: NetName=W\R\ Pin=P6-26
+Added Pin To Net: NetName=W\R\ Pin=U1-22
+Added Pin To Net: NetName=W\R\ Pin=U2-27
+Added Pin To Net: NetName=W\R\ Pin=U5-27
+Added Net: Name=W\R\
+Added Class: Name=BusViewer
+Added Class: Name=IODevices
+Added Class: Name=MainSheet
+Added Class: Name=Peripherals
+Added Room: Name=BusViewer
+Added Room: Name=IODevices
+Added Room: Name=MainSheet
+Added Room: Name=Peripherals
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 08-48-38.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 08-48-38.LOG
new file mode 100644
index 0000000..a796b08
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 08-48-38.LOG
@@ -0,0 +1,50 @@
+Added Pin To Net: NetName=NetDS1_1 Pin=DS1-1
+Added Pin To Net: NetName=NetDS1_2 Pin=DS1-2
+Added Pin To Net: NetName=DB9-5 Pin=DS1-3
+Added Pin To Net: NetName=NetDS1_4 Pin=DS1-4
+Added Pin To Net: NetName=NetDS1_6 Pin=DS1-6
+Added Pin To Net: NetName=NetDS1_7 Pin=DS1-7
+Added Pin To Net: NetName=DB9-5 Pin=DS1-8
+Added Pin To Net: NetName=NetDS1_9 Pin=DS1-9
+Added Pin To Net: NetName=NetDS1_10 Pin=DS1-10
+Added Pin To Net: NetName=NetDS3_1 Pin=DS3-1
+Added Pin To Net: NetName=NetDS3_2 Pin=DS3-2
+Added Pin To Net: NetName=DB9-5 Pin=DS3-3
+Added Pin To Net: NetName=NetDS3_4 Pin=DS3-4
+Added Pin To Net: NetName=NetDS3_6 Pin=DS3-6
+Added Pin To Net: NetName=NetDS3_7 Pin=DS3-7
+Added Pin To Net: NetName=DB9-5 Pin=DS3-8
+Added Pin To Net: NetName=NetDS3_9 Pin=DS3-9
+Added Pin To Net: NetName=NetDS3_10 Pin=DS3-10
+Added Pin To Net: NetName=NetDS1_1 Pin=U10-1
+Added Pin To Net: NetName=NetDS1_9 Pin=U10-2
+Added Pin To Net: NetName=NetDS1_10 Pin=U10-3
+Added Pin To Net: NetName=A0 Pin=U10-5
+Added Pin To Net: NetName=A1 Pin=U10-6
+Added Pin To Net: NetName=LE Pin=U10-7
+Added Pin To Net: NetName=DB9-5 Pin=U10-8
+Added Pin To Net: NetName=A2 Pin=U10-9
+Added Pin To Net: NetName=A3 Pin=U10-10
+Added Pin To Net: NetName=NetDS1_7 Pin=U10-12
+Added Pin To Net: NetName=NetDS1_6 Pin=U10-13
+Added Pin To Net: NetName=NetDS1_4 Pin=U10-14
+Added Pin To Net: NetName=NetDS1_2 Pin=U10-15
+Added Pin To Net: NetName=VCC Pin=U10-16
+Added Pin To Net: NetName=NetDS3_1 Pin=U12-1
+Added Pin To Net: NetName=NetDS3_9 Pin=U12-2
+Added Pin To Net: NetName=NetDS3_10 Pin=U12-3
+Added Pin To Net: NetName=A4 Pin=U12-5
+Added Pin To Net: NetName=A5 Pin=U12-6
+Added Pin To Net: NetName=LE Pin=U12-7
+Added Pin To Net: NetName=DB9-5 Pin=U12-8
+Added Pin To Net: NetName=A6 Pin=U12-9
+Added Pin To Net: NetName=A7 Pin=U12-10
+Added Pin To Net: NetName=NetDS3_7 Pin=U12-12
+Added Pin To Net: NetName=NetDS3_6 Pin=U12-13
+Added Pin To Net: NetName=NetDS3_4 Pin=U12-14
+Added Pin To Net: NetName=NetDS3_2 Pin=U12-15
+Added Pin To Net: NetName=VCC Pin=U12-16
+Added Member To Class: ClassName=BusViewer Member=Component DS1 Dpy Blue-CC
+Added Member To Class: ClassName=BusViewer Member=Component DS3 Dpy Blue-CC
+Added Member To Class: ClassName=BusViewer Member=Component U10 MC14495
+Added Member To Class: ClassName=BusViewer Member=Component U12 MC14495
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 11-16-39.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 11-16-39.LOG
new file mode 100644
index 0000000..dbe4382
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 11-16-39.LOG
@@ -0,0 +1,8 @@
+Added Component: Designator=J2(KLD-0202)
+Added Pin To Net: NetName=NetC11_2 Pin=J2-1
+Added Pin To Net: NetName=NetC11_2 Pin=J2-1
+Added Pin To Net: NetName=DB9-5 Pin=J2-2
+Added Pin To Net: NetName=DB9-5 Pin=J2-2
+Added Pin To Net: NetName=NetJ2_3 Pin=J2-3
+Added Pin To Net: NetName=NetJ2_3 Pin=J2-3
+Added Member To Class: ClassName=Peripherals Member=Component J2 PWR2.5
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 11-19-08.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 11-19-08.LOG
new file mode 100644
index 0000000..82c44e3
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 11-19-08.LOG
@@ -0,0 +1,20 @@
+Added Component: Designator=J2(KLD-0202)
+Added Pin To Net: NetName=NetC11_2 Pin=J2-1
+Added Pin To Net: NetName=NetC11_2 Pin=J2-1
+Added Pin To Net: NetName=NetC11_2 Pin=J2-1
+Added Pin To Net: NetName=NetC11_2 Pin=J2-1
+Added Pin To Net: NetName=NetC11_2 Pin=J2-1
+Added Pin To Net: NetName=NetC11_2 Pin=J2-1
+Added Pin To Net: NetName=DB9-5 Pin=J2-2
+Added Pin To Net: NetName=DB9-5 Pin=J2-2
+Added Pin To Net: NetName=DB9-5 Pin=J2-2
+Added Pin To Net: NetName=DB9-5 Pin=J2-2
+Added Pin To Net: NetName=DB9-5 Pin=J2-2
+Added Pin To Net: NetName=DB9-5 Pin=J2-2
+Added Pin To Net: NetName=NetJ2_3 Pin=J2-3
+Added Pin To Net: NetName=NetJ2_3 Pin=J2-3
+Added Pin To Net: NetName=NetJ2_3 Pin=J2-3
+Added Pin To Net: NetName=NetJ2_3 Pin=J2-3
+Added Pin To Net: NetName=NetJ2_3 Pin=J2-3
+Added Pin To Net: NetName=NetJ2_3 Pin=J2-3
+Added Member To Class: ClassName=Peripherals Member=Component J2 PWR2.5
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 15-15-57.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 15-15-57.LOG
new file mode 100644
index 0000000..1b7135b
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 15-15-57.LOG
@@ -0,0 +1,4 @@
+Added Component: Designator=C24(RB7.6-15)
+Added Pin To Net: NetName=NetC11_2 Pin=C24-1
+Added Pin To Net: NetName=DB9-5 Pin=C24-2
+Added Member To Class: ClassName=Peripherals Member=Component C24 Cap Pol1
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 15-17-08.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 15-17-08.LOG
new file mode 100644
index 0000000..01a0856
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 15-17-08.LOG
@@ -0,0 +1 @@
+Change Component Footprint: Designator=C24 Old Footprint=RB7.6-15 New Footprint=RB5-10.5
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-01.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-01.LOG
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-01.LOG
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-42.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-42.LOG
new file mode 100644
index 0000000..3ebc3ad
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-42.LOG
@@ -0,0 +1,11 @@
+Added Component: Designator=J2(KLD-0202)
+Added Pin To Net: NetName=NetC11_2 Pin=J2-1
+Added Pin To Net: NetName=NetC11_2 Pin=J2-1
+Added Pin To Net: NetName=NetC11_2 Pin=J2-1
+Added Pin To Net: NetName=DB9-5 Pin=J2-2
+Added Pin To Net: NetName=DB9-5 Pin=J2-2
+Added Pin To Net: NetName=DB9-5 Pin=J2-2
+Added Pin To Net: NetName=NetJ2_3 Pin=J2-3
+Added Pin To Net: NetName=NetJ2_3 Pin=J2-3
+Added Pin To Net: NetName=NetJ2_3 Pin=J2-3
+Added Member To Class: ClassName=Peripherals Member=Component J2 PWR2.5
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 10-58-34.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 10-58-34.LOG
new file mode 100644
index 0000000..d470467
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 10-58-34.LOG
@@ -0,0 +1,768 @@
+Change Component DesignItemId : Designator=P6 Old DesignItemId=MHDR1X10 New DesignItemId=Header 32X2
+Change Component Comment : Designator=P6 Old Comment=CNVME96 New Comment=Header 32X2
+Change Component Description : Designator=P6 Old Description=Header, 10-Pin New Description=Header, 32-Pin, Dual row
+Change Component Library : Designator=P6 Old Library=Miscellaneous Connectors.IntLib New Library=z80uPC.SCHLIB
+Added Component: Designator=C1(RAD-0.3)
+Added Component: Designator=C2(RAD-0.3)
+Added Component: Designator=C3(RAD-0.3)
+Added Component: Designator=C4(RAD-0.3)
+Added Component: Designator=C5(RAD-0.3)
+Added Component: Designator=C6(RAD-0.3)
+Added Component: Designator=C7(RAD-0.3)
+Added Component: Designator=C8(RAD-0.3)
+Added Component: Designator=C9(RAD-0.3)
+Added Component: Designator=C10(RAD-0.3)
+Added Component: Designator=C11(RAD-0.3)
+Added Component: Designator=C12(RAD-0.3)
+Added Component: Designator=C13(RAD-0.3)
+Added Component: Designator=C14(RAD-0.3)
+Added Component: Designator=C15(RAD-0.3)
+Added Component: Designator=C16(RAD-0.3)
+Added Component: Designator=C17(RAD-0.3)
+Added Component: Designator=C18(RAD-0.3)
+Added Component: Designator=C19(RAD-0.3)
+Added Component: Designator=C20(RAD-0.3)
+Added Component: Designator=C21(RAD-0.3)
+Added Component: Designator=C22(RAD-0.3)
+Added Component: Designator=C23(RAD-0.3)
+Added Component: Designator=D1(DO-35)
+Added Component: Designator=D2(DO-35)
+Added Component: Designator=DS1(H)
+Added Component: Designator=DS2(H)
+Added Component: Designator=DS3(H)
+Added Component: Designator=DS4(H)
+Added Component: Designator=DS5(H)
+Added Component: Designator=DS6(H)
+Added Component: Designator=J1(DSUB1.385-2H9)
+Added Component: Designator=J2(KLD-0202)
+Added Component: Designator=P1(MHDR2X5)
+Added Component: Designator=P2(HDR2X8)
+Added Component: Designator=P3(MHDR2X5)
+Added Component: Designator=P4(MHDR2X5)
+Added Component: Designator=P5(MHDR2X5)
+Added Component: Designator=P7(MHDR2X5)
+Added Component: Designator=R1(AXIAL-0.4)
+Added Component: Designator=R2(AXIAL-0.4)
+Added Component: Designator=R3(AXIAL-0.4)
+Added Component: Designator=R4(AXIAL-0.4)
+Added Component: Designator=R5(AXIAL-0.4)
+Added Component: Designator=R6(AXIAL-0.4)
+Added Component: Designator=R7(AXIAL-0.4)
+Added Component: Designator=S2(TL36WW15050)
+Added Component: Designator=S3(TL36WW15050)
+Added Component: Designator=S4(SPST-2)
+Added Component: Designator=S5(SPST-2)
+Added Component: Designator=U1(PDIP40)
+Added Component: Designator=U2(PDIP28)
+Added Component: Designator=U3(PDIP28)
+Added Component: Designator=U4(PLCC44_N)
+Added Component: Designator=U5(PDIP28)
+Added Component: Designator=U8(PDIP28)
+Added Component: Designator=U9(PDIP40)
+Added Component: Designator=U10(DIP16)
+Added Component: Designator=U11(DIP16)
+Added Component: Designator=U12(DIP16)
+Added Component: Designator=U13(DIP16)
+Added Component: Designator=U14(DIP16)
+Added Component: Designator=U15(DIP16)
+Added Component: Designator=U16(P008)
+Added Component: Designator=U17(DIP14)
+Added Component: Designator=U18(TO220ABN)
+Added Component: Designator=Y1(R38)
+Added Pin To Net: NetName=A0 Pin=U1-30
+Added Pin To Net: NetName=A0 Pin=U2-10
+Added Pin To Net: NetName=A0 Pin=U3-10
+Added Pin To Net: NetName=A0 Pin=U4-9
+Added Pin To Net: NetName=A0 Pin=U5-10
+Added Pin To Net: NetName=A0 Pin=U8-18
+Added Pin To Net: NetName=A0 Pin=U9-6
+Added Pin To Net: NetName=A0 Pin=U10-5
+Added Net: Name=A0
+Added Pin To Net: NetName=A1 Pin=U1-31
+Added Pin To Net: NetName=A1 Pin=U2-9
+Added Pin To Net: NetName=A1 Pin=U3-9
+Added Pin To Net: NetName=A1 Pin=U4-8
+Added Pin To Net: NetName=A1 Pin=U5-9
+Added Pin To Net: NetName=A1 Pin=U8-19
+Added Pin To Net: NetName=A1 Pin=U9-5
+Added Pin To Net: NetName=A1 Pin=U10-6
+Added Net: Name=A1
+Added Pin To Net: NetName=A2 Pin=U1-32
+Added Pin To Net: NetName=A2 Pin=U2-8
+Added Pin To Net: NetName=A2 Pin=U3-8
+Added Pin To Net: NetName=A2 Pin=U4-7
+Added Pin To Net: NetName=A2 Pin=U5-8
+Added Pin To Net: NetName=A2 Pin=U10-9
+Added Net: Name=A2
+Added Pin To Net: NetName=A3 Pin=U1-33
+Added Pin To Net: NetName=A3 Pin=U2-7
+Added Pin To Net: NetName=A3 Pin=U3-7
+Added Pin To Net: NetName=A3 Pin=U4-6
+Added Pin To Net: NetName=A3 Pin=U5-7
+Added Pin To Net: NetName=A3 Pin=U10-10
+Added Net: Name=A3
+Added Pin To Net: NetName=A4 Pin=U1-34
+Added Pin To Net: NetName=A4 Pin=U2-6
+Added Pin To Net: NetName=A4 Pin=U3-6
+Added Pin To Net: NetName=A4 Pin=U4-5
+Added Pin To Net: NetName=A4 Pin=U5-6
+Added Pin To Net: NetName=A4 Pin=U12-5
+Added Net: Name=A4
+Added Pin To Net: NetName=A5 Pin=U1-35
+Added Pin To Net: NetName=A5 Pin=U2-5
+Added Pin To Net: NetName=A5 Pin=U3-5
+Added Pin To Net: NetName=A5 Pin=U4-4
+Added Pin To Net: NetName=A5 Pin=U5-5
+Added Pin To Net: NetName=A5 Pin=U12-6
+Added Net: Name=A5
+Added Pin To Net: NetName=A6 Pin=U1-36
+Added Pin To Net: NetName=A6 Pin=U2-4
+Added Pin To Net: NetName=A6 Pin=U3-4
+Added Pin To Net: NetName=A6 Pin=U4-3
+Added Pin To Net: NetName=A6 Pin=U5-4
+Added Pin To Net: NetName=A6 Pin=U12-9
+Added Net: Name=A6
+Added Pin To Net: NetName=A7 Pin=U1-37
+Added Pin To Net: NetName=A7 Pin=U2-3
+Added Pin To Net: NetName=A7 Pin=U3-3
+Added Pin To Net: NetName=A7 Pin=U4-2
+Added Pin To Net: NetName=A7 Pin=U5-3
+Added Pin To Net: NetName=A7 Pin=U12-10
+Added Net: Name=A7
+Added Pin To Net: NetName=A8 Pin=U1-38
+Added Pin To Net: NetName=A8 Pin=U2-25
+Added Pin To Net: NetName=A8 Pin=U3-25
+Added Pin To Net: NetName=A8 Pin=U4-14
+Added Pin To Net: NetName=A8 Pin=U5-25
+Added Pin To Net: NetName=A8 Pin=U14-5
+Added Net: Name=A8
+Added Pin To Net: NetName=A9 Pin=U1-39
+Added Pin To Net: NetName=A9 Pin=U2-24
+Added Pin To Net: NetName=A9 Pin=U3-24
+Added Pin To Net: NetName=A9 Pin=U4-15
+Added Pin To Net: NetName=A9 Pin=U5-24
+Added Pin To Net: NetName=A9 Pin=U14-6
+Added Net: Name=A9
+Added Pin To Net: NetName=A10 Pin=U1-40
+Added Pin To Net: NetName=A10 Pin=U2-21
+Added Pin To Net: NetName=A10 Pin=U3-21
+Added Pin To Net: NetName=A10 Pin=U4-16
+Added Pin To Net: NetName=A10 Pin=U5-21
+Added Pin To Net: NetName=A10 Pin=U14-9
+Added Net: Name=A10
+Added Pin To Net: NetName=A11 Pin=U1-1
+Added Pin To Net: NetName=A11 Pin=U2-23
+Added Pin To Net: NetName=A11 Pin=U3-23
+Added Pin To Net: NetName=A11 Pin=U4-17
+Added Pin To Net: NetName=A11 Pin=U5-23
+Added Pin To Net: NetName=A11 Pin=U14-10
+Added Net: Name=A11
+Added Pin To Net: NetName=A12 Pin=U1-2
+Added Pin To Net: NetName=A12 Pin=U2-2
+Added Pin To Net: NetName=A12 Pin=U3-2
+Added Pin To Net: NetName=A12 Pin=U4-18
+Added Pin To Net: NetName=A12 Pin=U5-2
+Added Pin To Net: NetName=A12 Pin=U15-5
+Added Net: Name=A12
+Added Pin To Net: NetName=A13 Pin=U1-3
+Added Pin To Net: NetName=A13 Pin=U3-26
+Added Pin To Net: NetName=A13 Pin=U4-19
+Added Pin To Net: NetName=A13 Pin=U15-6
+Added Net: Name=A13
+Added Pin To Net: NetName=A14 Pin=U1-4
+Added Pin To Net: NetName=A14 Pin=U3-1
+Added Pin To Net: NetName=A14 Pin=U4-20
+Added Pin To Net: NetName=A14 Pin=U15-9
+Added Net: Name=A14
+Added Pin To Net: NetName=A15 Pin=U1-5
+Added Pin To Net: NetName=A15 Pin=U4-21
+Added Pin To Net: NetName=A15 Pin=U15-10
+Added Net: Name=A15
+Added Pin To Net: NetName=B\U\S\A\C\K\ Pin=U1-23
+Added Net: Name=B\U\S\A\C\K\
+Added Pin To Net: NetName=B\U\S\R\E\Q\ Pin=U1-25
+Added Net: Name=B\U\S\R\E\Q\
+Added Pin To Net: NetName=C\S\C\T\C\ Pin=U4-28
+Added Pin To Net: NetName=C\S\C\T\C\ Pin=U8-16
+Added Net: Name=C\S\C\T\C\
+Added Pin To Net: NetName=C\S\P\I\O\ Pin=U4-29
+Added Pin To Net: NetName=C\S\P\I\O\ Pin=U9-4
+Added Net: Name=C\S\P\I\O\
+Added Pin To Net: NetName=C\S\R\A\M\ Pin=U3-20
+Added Pin To Net: NetName=C\S\R\A\M\ Pin=U4-26
+Added Net: Name=C\S\R\A\M\
+Added Pin To Net: NetName=C\S\R\O\M\H\ Pin=U4-25
+Added Pin To Net: NetName=C\S\R\O\M\H\ Pin=U5-20
+Added Net: Name=C\S\R\O\M\H\
+Added Pin To Net: NetName=C\S\R\O\M\L\ Pin=U2-20
+Added Pin To Net: NetName=C\S\R\O\M\L\ Pin=U4-24
+Added Net: Name=C\S\R\O\M\L\
+Added Pin To Net: NetName=C\S\U\A\R\T\ Pin=U4-27
+Added Net: Name=C\S\U\A\R\T\
+Added Pin To Net: NetName=C\T\S\ Pin=P2-7
+Added Pin To Net: NetName=C\T\S\ Pin=P3-4
+Added Net: Name=C\T\S\
+Added Pin To Net: NetName=CLK1 Pin=C7-2
+Added Pin To Net: NetName=CLK1 Pin=D1-2
+Added Pin To Net: NetName=CLK1 Pin=R5-2
+Added Net: Name=CLK1
+Added Pin To Net: NetName=CLK2 Pin=U16-3
+Added Net: Name=CLK2
+Added Pin To Net: NetName=CLK3 Pin=U17-8
+Added Net: Name=CLK3
+Added Pin To Net: NetName=CLK Pin=U1-6
+Added Pin To Net: NetName=CLK Pin=U4-11
+Added Pin To Net: NetName=CLK Pin=U4-33
+Added Pin To Net: NetName=CLK Pin=U8-15
+Added Pin To Net: NetName=CLK Pin=U9-25
+Added Net: Name=CLK
+Added Pin To Net: NetName=D0 Pin=U1-14
+Added Pin To Net: NetName=D0 Pin=U2-11
+Added Pin To Net: NetName=D0 Pin=U3-11
+Added Pin To Net: NetName=D0 Pin=U5-11
+Added Pin To Net: NetName=D0 Pin=U8-25
+Added Pin To Net: NetName=D0 Pin=U9-19
+Added Pin To Net: NetName=D0 Pin=U11-5
+Added Net: Name=D0
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-05-38.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-05-38.LOG
new file mode 100644
index 0000000..ae25cfa
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-05-38.LOG
@@ -0,0 +1,801 @@
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+Change Component Comment : Designator=P6 Old Comment=CNVME96 New Comment=Header 32X2
+Change Component Description : Designator=P6 Old Description=Header, 10-Pin New Description=Header, 32-Pin, Dual row
+Change Component Library : Designator=P6 Old Library=Miscellaneous Connectors.IntLib New Library=z80uPC.SCHLIB
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-14-26.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-14-26.LOG
new file mode 100644
index 0000000..07029c3
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-14-26.LOG
@@ -0,0 +1,801 @@
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+Change Component Comment : Designator=P6 Old Comment=CNVME96 New Comment=Header 32X2
+Change Component Description : Designator=P6 Old Description=Header, 10-Pin New Description=Header, 32-Pin, Dual row
+Change Component Library : Designator=P6 Old Library=Miscellaneous Connectors.IntLib New Library=z80uPC.SCHLIB
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+Added Component: Designator=C2(RAD-0.3)
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+Added Component: Designator=C4(RAD-0.3)
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+Added Component: Designator=C12(RAD-0.3)
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-51-56.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-51-56.LOG
new file mode 100644
index 0000000..e34d7ed
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-51-56.LOG
@@ -0,0 +1,802 @@
+Change Component DesignItemId : Designator=P6 Old DesignItemId=MHDR1X10 New DesignItemId=Header 32X2
+Change Component Comment : Designator=P6 Old Comment=CNVME96 New Comment=Header 32X2
+Change Component Description : Designator=P6 Old Description=Header, 10-Pin New Description=Header, 32-Pin, Dual row
+Change Component Library : Designator=P6 Old Library=Miscellaneous Connectors.IntLib New Library=z80uPC.SCHLIB
+Added Component: Designator=C1(RAD-0.3)
+Added Component: Designator=C2(RAD-0.3)
+Added Component: Designator=C3(RAD-0.3)
+Added Component: Designator=C4(RAD-0.3)
+Added Component: Designator=C5(RAD-0.3)
+Added Component: Designator=C6(RAD-0.3)
+Added Component: Designator=C7(RAD-0.3)
+Added Component: Designator=C8(RAD-0.3)
+Added Component: Designator=C9(RAD-0.3)
+Added Component: Designator=C10(RAD-0.3)
+Added Component: Designator=C11(RAD-0.3)
+Added Component: Designator=C12(RAD-0.3)
+Added Component: Designator=C13(RAD-0.1)
+Added Component: Designator=C14(RAD-0.1)
+Added Component: Designator=C15(RAD-0.1)
+Added Component: Designator=C16(RAD-0.1)
+Added Component: Designator=C17(RAD-0.1)
+Added Component: Designator=C18(RAD-0.1)
+Added Component: Designator=C19(RAD-0.1)
+Added Component: Designator=C20(RAD-0.1)
+Added Component: Designator=C21(RAD-0.1)
+Added Component: Designator=C22(RAD-0.1)
+Added Component: Designator=C23(RAD-0.1)
+Added Component: Designator=D1(DO-35)
+Added Component: Designator=D2(DO-35)
+Added Component: Designator=DS1(H)
+Added Component: Designator=DS2(H)
+Added Component: Designator=DS3(H)
+Added Component: Designator=DS4(H)
+Added Component: Designator=DS5(H)
+Added Component: Designator=DS6(H)
+Added Component: Designator=J1(DSUB1.385-2H9)
+Added Component: Designator=J2(KLD-0202)
+Added Component: Designator=P1(MHDR2X5)
+Added Component: Designator=P2(HDR2X8)
+Added Component: Designator=P3(MHDR2X5)
+Added Component: Designator=P4(MHDR2X5)
+Added Component: Designator=P5(MHDR2X5)
+Added Component: Designator=P7(MHDR2X5)
+Added Component: Designator=R1(AXIAL-0.4)
+Added Component: Designator=R2(AXIAL-0.4)
+Added Component: Designator=R3(AXIAL-0.4)
+Added Component: Designator=R4(AXIAL-0.4)
+Added Component: Designator=R5(AXIAL-0.4)
+Added Component: Designator=R6(AXIAL-0.4)
+Added Component: Designator=R7(AXIAL-0.4)
+Added Component: Designator=S1(SW_3WAY)
+Added Component: Designator=S2(TL36WW15050)
+Added Component: Designator=S3(TL36WW15050)
+Added Component: Designator=S4(SPST-2)
+Added Component: Designator=S5(SPST-2)
+Added Component: Designator=U1(PDIP40)
+Added Component: Designator=U2(PDIP28)
+Added Component: Designator=U3(PDIP28)
+Added Component: Designator=U4(PLCC44_SOCKET)
+Added Component: Designator=U5(PDIP28)
+Added Component: Designator=U6(PLCC44_SOCKET)
+Added Component: Designator=U8(PDIP28)
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+Added Component: Designator=U10(DIP16)
+Added Component: Designator=U11(DIP16)
+Added Component: Designator=U12(DIP16)
+Added Component: Designator=U13(DIP16)
+Added Component: Designator=U14(DIP16)
+Added Component: Designator=U15(DIP16)
+Added Component: Designator=U16(P008)
+Added Component: Designator=U17(DIP14)
+Added Component: Designator=U18(TO220ABN)
+Added Component: Designator=Y1(R38)
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-54-08.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-54-08.LOG
new file mode 100644
index 0000000..e34d7ed
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 11-54-08.LOG
@@ -0,0 +1,802 @@
+Change Component DesignItemId : Designator=P6 Old DesignItemId=MHDR1X10 New DesignItemId=Header 32X2
+Change Component Comment : Designator=P6 Old Comment=CNVME96 New Comment=Header 32X2
+Change Component Description : Designator=P6 Old Description=Header, 10-Pin New Description=Header, 32-Pin, Dual row
+Change Component Library : Designator=P6 Old Library=Miscellaneous Connectors.IntLib New Library=z80uPC.SCHLIB
+Added Component: Designator=C1(RAD-0.3)
+Added Component: Designator=C2(RAD-0.3)
+Added Component: Designator=C3(RAD-0.3)
+Added Component: Designator=C4(RAD-0.3)
+Added Component: Designator=C5(RAD-0.3)
+Added Component: Designator=C6(RAD-0.3)
+Added Component: Designator=C7(RAD-0.3)
+Added Component: Designator=C8(RAD-0.3)
+Added Component: Designator=C9(RAD-0.3)
+Added Component: Designator=C10(RAD-0.3)
+Added Component: Designator=C11(RAD-0.3)
+Added Component: Designator=C12(RAD-0.3)
+Added Component: Designator=C13(RAD-0.1)
+Added Component: Designator=C14(RAD-0.1)
+Added Component: Designator=C15(RAD-0.1)
+Added Component: Designator=C16(RAD-0.1)
+Added Component: Designator=C17(RAD-0.1)
+Added Component: Designator=C18(RAD-0.1)
+Added Component: Designator=C19(RAD-0.1)
+Added Component: Designator=C20(RAD-0.1)
+Added Component: Designator=C21(RAD-0.1)
+Added Component: Designator=C22(RAD-0.1)
+Added Component: Designator=C23(RAD-0.1)
+Added Component: Designator=D1(DO-35)
+Added Component: Designator=D2(DO-35)
+Added Component: Designator=DS1(H)
+Added Component: Designator=DS2(H)
+Added Component: Designator=DS3(H)
+Added Component: Designator=DS4(H)
+Added Component: Designator=DS5(H)
+Added Component: Designator=DS6(H)
+Added Component: Designator=J1(DSUB1.385-2H9)
+Added Component: Designator=J2(KLD-0202)
+Added Component: Designator=P1(MHDR2X5)
+Added Component: Designator=P2(HDR2X8)
+Added Component: Designator=P3(MHDR2X5)
+Added Component: Designator=P4(MHDR2X5)
+Added Component: Designator=P5(MHDR2X5)
+Added Component: Designator=P7(MHDR2X5)
+Added Component: Designator=R1(AXIAL-0.4)
+Added Component: Designator=R2(AXIAL-0.4)
+Added Component: Designator=R3(AXIAL-0.4)
+Added Component: Designator=R4(AXIAL-0.4)
+Added Component: Designator=R5(AXIAL-0.4)
+Added Component: Designator=R6(AXIAL-0.4)
+Added Component: Designator=R7(AXIAL-0.4)
+Added Component: Designator=S1(SW_3WAY)
+Added Component: Designator=S2(TL36WW15050)
+Added Component: Designator=S3(TL36WW15050)
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 13-41-49.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 13-41-49.LOG
new file mode 100644
index 0000000..994bc02
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 13-41-49.LOG
@@ -0,0 +1,802 @@
+Change Component DesignItemId : Designator=P6 Old DesignItemId=MHDR1X10 New DesignItemId=Header 32X2
+Change Component Comment : Designator=P6 Old Comment=CNVME96 New Comment=Header 32X2
+Change Component Description : Designator=P6 Old Description=Header, 10-Pin New Description=Header, 32-Pin, Dual row
+Change Component Library : Designator=P6 Old Library=Miscellaneous Connectors.IntLib New Library=z80uPC.SCHLIB
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+Added Component: Designator=C2(RAD-0.3)
+Added Component: Designator=C3(RAD-0.3)
+Added Component: Designator=C4(RAD-0.3)
+Added Component: Designator=C5(RAD-0.3)
+Added Component: Designator=C6(RAD-0.3)
+Added Component: Designator=C7(RAD-0.3)
+Added Component: Designator=C8(RAD-0.3)
+Added Component: Designator=C9(RAD-0.3)
+Added Component: Designator=C10(RAD-0.3)
+Added Component: Designator=C11(RAD-0.3)
+Added Component: Designator=C12(RAD-0.3)
+Added Component: Designator=C13(RAD-0.1)
+Added Component: Designator=C14(RAD-0.1)
+Added Component: Designator=C15(RAD-0.1)
+Added Component: Designator=C16(RAD-0.1)
+Added Component: Designator=C17(RAD-0.1)
+Added Component: Designator=C18(RAD-0.1)
+Added Component: Designator=C19(RAD-0.1)
+Added Component: Designator=C20(RAD-0.1)
+Added Component: Designator=C21(RAD-0.1)
+Added Component: Designator=C22(RAD-0.1)
+Added Component: Designator=C23(RAD-0.1)
+Added Component: Designator=D1(DO-35)
+Added Component: Designator=D2(DO-35)
+Added Component: Designator=DS1(H)
+Added Component: Designator=DS2(H)
+Added Component: Designator=DS3(H)
+Added Component: Designator=DS4(H)
+Added Component: Designator=DS5(H)
+Added Component: Designator=DS6(H)
+Added Component: Designator=J1(DSUB1.385-2H9)
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-19-39.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-19-39.LOG
new file mode 100644
index 0000000..40eb54d
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-19-39.LOG
@@ -0,0 +1,802 @@
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+Change Component Comment : Designator=P6 Old Comment=CNVME96 New Comment=Header 32X2
+Change Component Description : Designator=P6 Old Description=Header, 10-Pin New Description=Header, 32-Pin, Dual row
+Change Component Library : Designator=P6 Old Library=Miscellaneous Connectors.IntLib New Library=z80uPC.SCHLIB
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+Added Component: Designator=C11(RAD-0.3)
+Added Component: Designator=C12(RAD-0.1)
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-21-23.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-21-23.LOG
new file mode 100644
index 0000000..b6fecab
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-21-23.LOG
@@ -0,0 +1,802 @@
+Change Component DesignItemId : Designator=P6 Old DesignItemId=MHDR1X10 New DesignItemId=Header 32X2
+Change Component Comment : Designator=P6 Old Comment=CNVME96 New Comment=Header 32X2
+Change Component Description : Designator=P6 Old Description=Header, 10-Pin New Description=Header, 32-Pin, Dual row
+Change Component Library : Designator=P6 Old Library=Miscellaneous Connectors.IntLib New Library=z80uPC.SCHLIB
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+Added Component: Designator=C2(RAD-0.3)
+Added Component: Designator=C3(RAD-0.3)
+Added Component: Designator=C4(RAD-0.3)
+Added Component: Designator=C5(RAD-0.1)
+Added Component: Designator=C6(RAD-0.2)
+Added Component: Designator=C7(RAD-0.1)
+Added Component: Designator=C8(RAD-0.1)
+Added Component: Designator=C9(RAD-0.1)
+Added Component: Designator=C10(RAD-0.4)
+Added Component: Designator=C11(RAD-0.3)
+Added Component: Designator=C12(RAD-0.1)
+Added Component: Designator=C13(RAD-0.1)
+Added Component: Designator=C14(RAD-0.1)
+Added Component: Designator=C15(RAD-0.1)
+Added Component: Designator=C16(RAD-0.1)
+Added Component: Designator=C17(RAD-0.1)
+Added Component: Designator=C18(RAD-0.1)
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+Added Component: Designator=C23(RAD-0.1)
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+Added Component: Designator=D2(DO-35)
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+Added Component: Designator=DS4(H)
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-23-38.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-23-38.LOG
new file mode 100644
index 0000000..9656497
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-23-38.LOG
@@ -0,0 +1,802 @@
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+Change Component Comment : Designator=P6 Old Comment=CNVME96 New Comment=Header 32X2
+Change Component Description : Designator=P6 Old Description=Header, 10-Pin New Description=Header, 32-Pin, Dual row
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-24-09.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-24-09.LOG
new file mode 100644
index 0000000..01d9c6a
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-24-09.LOG
@@ -0,0 +1,802 @@
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+Change Component Comment : Designator=P6 Old Comment=CNVME96 New Comment=Header 32X2
+Change Component Description : Designator=P6 Old Description=Header, 10-Pin New Description=Header, 32-Pin, Dual row
+Change Component Library : Designator=P6 Old Library=Miscellaneous Connectors.IntLib New Library=z80uPC.SCHLIB
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+Added Component: Designator=C2(RAD-0.3)
+Added Component: Designator=C3(RAD-0.3)
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+Added Component: Designator=C9(RAD-0.1)
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+Added Component: Designator=C11(RAD-0.3)
+Added Component: Designator=C12(RAD-0.1)
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-25-00.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-25-00.LOG
new file mode 100644
index 0000000..b6fecab
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 14-25-00.LOG
@@ -0,0 +1,802 @@
+Change Component DesignItemId : Designator=P6 Old DesignItemId=MHDR1X10 New DesignItemId=Header 32X2
+Change Component Comment : Designator=P6 Old Comment=CNVME96 New Comment=Header 32X2
+Change Component Description : Designator=P6 Old Description=Header, 10-Pin New Description=Header, 32-Pin, Dual row
+Change Component Library : Designator=P6 Old Library=Miscellaneous Connectors.IntLib New Library=z80uPC.SCHLIB
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+Added Component: Designator=C2(RAD-0.3)
+Added Component: Designator=C3(RAD-0.3)
+Added Component: Designator=C4(RAD-0.3)
+Added Component: Designator=C5(RAD-0.1)
+Added Component: Designator=C6(RAD-0.2)
+Added Component: Designator=C7(RAD-0.1)
+Added Component: Designator=C8(RAD-0.1)
+Added Component: Designator=C9(RAD-0.1)
+Added Component: Designator=C10(RAD-0.4)
+Added Component: Designator=C11(RAD-0.3)
+Added Component: Designator=C12(RAD-0.1)
+Added Component: Designator=C13(RAD-0.1)
+Added Component: Designator=C14(RAD-0.1)
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 15-07-53.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 15-07-53.LOG
new file mode 100644
index 0000000..5819a0d
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 15-07-53.LOG
@@ -0,0 +1,798 @@
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 15-16-56.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 15-16-56.LOG
new file mode 100644
index 0000000..f070df2
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 24.04.2017 15-16-56.LOG
@@ -0,0 +1,800 @@
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-23-33.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-23-33.LOG
new file mode 100644
index 0000000..fe6c6bc
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-23-33.LOG
@@ -0,0 +1,73 @@
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-28-33.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-28-33.LOG
new file mode 100644
index 0000000..459b592
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-28-33.LOG
@@ -0,0 +1,706 @@
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+Added Component: Designator=DS1(H)
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+Added Component: Designator=P6(0973264X804)
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+Added Component: Designator=R1(AXIAL-0.4)
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+Added Component: Designator=R3(AXIAL-0.4)
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+Added Component: Designator=R5(AXIAL-0.4)
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-37-23.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-37-23.LOG
new file mode 100644
index 0000000..5ea8940
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-37-23.LOG
@@ -0,0 +1,102 @@
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diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-46-27.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-46-27.LOG
new file mode 100644
index 0000000..c73d474
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 10-46-27.LOG
@@ -0,0 +1,51 @@
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+Added Pin To Net: NetName=D3 Pin=P6-A4
+Added Pin To Net: NetName=D5 Pin=P6-A5
+Added Pin To Net: NetName=D7 Pin=P6-A6
+Added Pin To Net: NetName=DB9-5 Pin=P6-A7
+Added Pin To Net: NetName=A1 Pin=P6-A8
+Added Pin To Net: NetName=A3 Pin=P6-A9
+Added Pin To Net: NetName=A5 Pin=P6-A10
+Added Pin To Net: NetName=A7 Pin=P6-A11
+Added Pin To Net: NetName=A9 Pin=P6-A12
+Added Pin To Net: NetName=A11 Pin=P6-A13
+Added Pin To Net: NetName=A13 Pin=P6-A14
+Added Pin To Net: NetName=A15 Pin=P6-A15
+Added Pin To Net: NetName=W\R\ Pin=P6-A18
+Added Pin To Net: NetName=DB9-5 Pin=P6-A19
+Added Pin To Net: NetName=M\1\ Pin=P6-A20
+Added Pin To Net: NetName=DB9-5 Pin=P6-A21
+Added Pin To Net: NetName=R\S\T\ Pin=P6-A22
+Added Pin To Net: NetName=NMI Pin=P6-A23
+Added Pin To Net: NetName=I\O\R\Q\ Pin=P6-A24
+Added Pin To Net: NetName=W\A\I\T\ Pin=P6-A25
+Added Pin To Net: NetName=VCC Pin=P6-A31
+Added Pin To Net: NetName=DB9-5 Pin=P6-A32
+Added Pin To Net: NetName=DB9-5 Pin=P6-C1
+Added Pin To Net: NetName=VCC Pin=P6-C2
+Added Pin To Net: NetName=D0 Pin=P6-C3
+Added Pin To Net: NetName=D2 Pin=P6-C4
+Added Pin To Net: NetName=D4 Pin=P6-C5
+Added Pin To Net: NetName=D6 Pin=P6-C6
+Added Pin To Net: NetName=A0 Pin=P6-C7
+Added Pin To Net: NetName=A2 Pin=P6-C8
+Added Pin To Net: NetName=A4 Pin=P6-C9
+Added Pin To Net: NetName=A6 Pin=P6-C10
+Added Pin To Net: NetName=A8 Pin=P6-C11
+Added Pin To Net: NetName=A10 Pin=P6-C12
+Added Pin To Net: NetName=A12 Pin=P6-C13
+Added Pin To Net: NetName=A14 Pin=P6-C14
+Added Pin To Net: NetName=R\D\ Pin=P6-C17
+Added Pin To Net: NetName=I\N\T\ Pin=P6-C22
+Added Pin To Net: NetName=M\R\E\Q\ Pin=P6-C23
+Added Pin To Net: NetName=H\A\L\T\ Pin=P6-C24
+Added Pin To Net: NetName=R\F\S\H\ Pin=P6-C25
+Added Pin To Net: NetName=DB9-5 Pin=P6-C26
+Added Pin To Net: NetName=B\U\S\R\E\Q\ Pin=P6-C27
+Added Pin To Net: NetName=B\U\S\A\C\K\ Pin=P6-C28
+Added Pin To Net: NetName=CLK Pin=P6-C29
+Added Pin To Net: NetName=VCC Pin=P6-C31
+Added Pin To Net: NetName=DB9-5 Pin=P6-C32
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 11-02-01.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 11-02-01.LOG
new file mode 100644
index 0000000..9f98c06
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 25.04.2017 11-02-01.LOG
@@ -0,0 +1 @@
+Added Member To Class: ClassName=Peripherals Member=Component U16 SE555P
diff --git a/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 26.04.2017 16-27-14.LOG b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 26.04.2017 16-27-14.LOG
new file mode 100644
index 0000000..db8ea1a
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainBoard PCB ECO 26.04.2017 16-27-14.LOG
@@ -0,0 +1,4 @@
+Change Component Footprint: Designator=P3 Old Footprint=MHDR2X5 New Footprint=HDR2X5
+Change Net Name : Old Net Name=GND New Net Name=DB9-5
+Added Member To Class: ClassName=Peripherals Member=Component C10 Cap
+Added Room: Name=MainSheet
diff --git a/hw-altium/Project Logs for z80uPC/MainSheet SCH ECO 20.03.2017 08-17-19.LOG b/hw-altium/Project Logs for z80uPC/MainSheet SCH ECO 20.03.2017 08-17-19.LOG
new file mode 100644
index 0000000..86a0c77
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainSheet SCH ECO 20.03.2017 08-17-19.LOG
@@ -0,0 +1,5 @@
+Change Component Designator: Old Designator=U1 New Designator=U?
+Change Component Designator: Old Designator=U2 New Designator=U?
+Change Component Designator: Old Designator=U3 New Designator=U?
+Change Component Designator: Old Designator=U4 New Designator=U?
+Change Component Designator: Old Designator=U8 New Designator=U?
diff --git a/hw-altium/Project Logs for z80uPC/MainSheet SCH ECO 31.03.2017 14-10-14.LOG b/hw-altium/Project Logs for z80uPC/MainSheet SCH ECO 31.03.2017 14-10-14.LOG
new file mode 100644
index 0000000..9b707c2
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/MainSheet SCH ECO 31.03.2017 14-10-14.LOG
@@ -0,0 +1,6 @@
+Change Component Designator: Old Designator=S? New Designator=S1
+Change Component Designator: Old Designator=U? New Designator=U1
+Change Component Designator: Old Designator=U? New Designator=U2
+Change Component Designator: Old Designator=U? New Designator=U3
+Change Component Designator: Old Designator=U? New Designator=U4
+Change Component Designator: Old Designator=U? New Designator=U5
diff --git a/hw-altium/Project Logs for z80uPC/Peripherals SCH ECO 31.03.2017 14-10-14.LOG b/hw-altium/Project Logs for z80uPC/Peripherals SCH ECO 31.03.2017 14-10-14.LOG
new file mode 100644
index 0000000..3b00ebb
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/Peripherals SCH ECO 31.03.2017 14-10-14.LOG
@@ -0,0 +1,32 @@
+Change Component Designator: Old Designator=C? New Designator=C7
+Change Component Designator: Old Designator=C? New Designator=C8
+Change Component Designator: Old Designator=C? New Designator=C9
+Change Component Designator: Old Designator=C? New Designator=C10
+Change Component Designator: Old Designator=C? New Designator=C11
+Change Component Designator: Old Designator=C? New Designator=C12
+Change Component Designator: Old Designator=C? New Designator=C13
+Change Component Designator: Old Designator=C? New Designator=C14
+Change Component Designator: Old Designator=C? New Designator=C15
+Change Component Designator: Old Designator=C? New Designator=C16
+Change Component Designator: Old Designator=C? New Designator=C17
+Change Component Designator: Old Designator=C? New Designator=C18
+Change Component Designator: Old Designator=C? New Designator=C19
+Change Component Designator: Old Designator=C? New Designator=C20
+Change Component Designator: Old Designator=C? New Designator=C21
+Change Component Designator: Old Designator=C? New Designator=C22
+Change Component Designator: Old Designator=C? New Designator=C23
+Change Component Designator: Old Designator=D? New Designator=D1
+Change Component Designator: Old Designator=D? New Designator=D2
+Change Component Designator: Old Designator=J? New Designator=J2
+Change Component Designator: Old Designator=P? New Designator=P7
+Change Component Designator: Old Designator=P?? New Designator=P6
+Change Component Designator: Old Designator=R? New Designator=R3
+Change Component Designator: Old Designator=R? New Designator=R4
+Change Component Designator: Old Designator=R? New Designator=R5
+Change Component Designator: Old Designator=R? New Designator=R6
+Change Component Designator: Old Designator=R? New Designator=R7
+Change Component Designator: Old Designator=S? New Designator=S4
+Change Component Designator: Old Designator=S? New Designator=S5
+Change Component Designator: Old Designator=U? New Designator=U16
+Change Component Designator: Old Designator=U? New Designator=U17
+Change Component Designator: Old Designator=U? New Designator=U18
diff --git a/hw-altium/Project Logs for z80uPC/Power SCH ECO 20.03.2017 08-17-19.LOG b/hw-altium/Project Logs for z80uPC/Power SCH ECO 20.03.2017 08-17-19.LOG
new file mode 100644
index 0000000..aad27ee
--- /dev/null
+++ b/hw-altium/Project Logs for z80uPC/Power SCH ECO 20.03.2017 08-17-19.LOG
@@ -0,0 +1,4 @@
+Change Component Designator: Old Designator=C1 New Designator=C?
+Change Component Designator: Old Designator=C2 New Designator=C?
+Change Component Designator: Old Designator=J1 New Designator=J?
+Change Component Designator: Old Designator=U7 New Designator=U?