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authorNao Pross <naopross@thearcway.org>2017-05-18 14:44:25 +0200
committerNao Pross <naopross@thearcway.org>2017-05-18 14:44:25 +0200
commit8992f39ebcbf82fd02b246dcf8f8ed3a69f7b81b (patch)
tree598dcf9be6ab043fdf68649b588fd5a51bfc6c00 /hw/History
parentwires from DB-9 and HDR5x2 connector to MAX214 (U7) and crystal for TL16C550 (diff)
downloadz80uPC-8992f39ebcbf82fd02b246dcf8f8ed3a69f7b81b.tar.gz
z80uPC-8992f39ebcbf82fd02b246dcf8f8ed3a69f7b81b.zip
wiring for P4 and P5 (I/O ports) and circuits for CLKs and RST
Diffstat (limited to 'hw/History')
-rw-r--r--hw/History/MainBoard.~(161).PcbDoc.Zip (renamed from hw/History/MainBoard.~(111).PcbDoc.Zip)bin593530 -> 590103 bytes
-rw-r--r--hw/History/MainBoard.~(162).PcbDoc.Zip (renamed from hw/History/MainBoard.~(113).PcbDoc.Zip)bin594330 -> 590313 bytes
-rw-r--r--hw/History/MainBoard.~(163).PcbDoc.Zip (renamed from hw/History/MainBoard.~(112).PcbDoc.Zip)bin594055 -> 590848 bytes
-rw-r--r--hw/History/MainBoard.~(164).PcbDoc.Zip (renamed from hw/History/MainBoard.~(110).PcbDoc.Zip)bin593590 -> 590986 bytes
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diff --git a/hw/History/MainBoard.~(111).PcbDoc.Zip b/hw/History/MainBoard.~(161).PcbDoc.Zip
index 349f65b..13e4fe5 100644
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diff --git a/hw/History/MainBoard.~(112).PcbDoc.Zip b/hw/History/MainBoard.~(163).PcbDoc.Zip
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index 3393490..df4d29e 100644
--- a/hw/History/MainBoard.~(110).PcbDoc.Zip
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