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authorNao Pross <naopross@thearcway.org>2018-10-30 12:07:58 +0100
committerNao Pross <naopross@thearcway.org>2018-10-30 12:34:37 +0100
commitcda16639cbf19d6eb5c11f05f1045e54b3fdaba9 (patch)
tree25227b76ae6dd50d5eddc30e4806af2003e70f54 /sw-avr/rom-loader/usart.c
parentUpdate gitignore (diff)
downloadz80uPC-cda16639cbf19d6eb5c11f05f1045e54b3fdaba9.tar.gz
z80uPC-cda16639cbf19d6eb5c11f05f1045e54b3fdaba9.zip
[avr] Add test program for IO and basic usart
Diffstat (limited to 'sw-avr/rom-loader/usart.c')
-rw-r--r--sw-avr/rom-loader/usart.c37
1 files changed, 37 insertions, 0 deletions
diff --git a/sw-avr/rom-loader/usart.c b/sw-avr/rom-loader/usart.c
new file mode 100644
index 0000000..5637d4f
--- /dev/null
+++ b/sw-avr/rom-loader/usart.c
@@ -0,0 +1,37 @@
+#include "usart.h"
+
+#include <avr/io.h>
+#include <util/setbaud.h>
+
+void usart_init(void)
+{
+ // automated by util/setbaud.h
+ UBRR0H = UBRRH_VALUE;
+ UBRR0L = UBRRL_VALUE;
+
+#if USE_2X
+ UCSR0A |= _BV(U2X0);
+#else
+ UCSR0A &= ~(_BV(U2X0));
+#endif
+
+ // 8 bit data
+ UCSR0C = _BV(UCSZ01) | _BV(UCSZ00);
+
+ // enable TX and RX pins
+ UCSR0B = _BV(RXEN0) | _BV(TXEN0);
+}
+
+void usart_send(uint8_t c)
+{
+ UDR0 = c;
+ // wait until transmission ready
+ loop_until_bit_is_set(UCSR0A, TXC0);
+}
+
+uint8_t usart_recv(void)
+{
+ // wait until data exists
+ loop_until_bit_is_set(UCSR0A, RXC0);
+ return UDR0;
+}