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authorNao Pross <naopross@thearcway.org>2018-10-30 11:41:24 +0100
committerNao Pross <naopross@thearcway.org>2018-10-30 11:41:24 +0100
commit43be150dc6e84f6f6eeb071cd3cdb7fc21125d60 (patch)
tree541fd3d690c1bdfd7b68d684029a400b80f4aa06 /sw-old/cpld/address_decoder.nrp
parentAdd datasheets for ATmega328 and 74LS259 (diff)
downloadz80uPC-43be150dc6e84f6f6eeb071cd3cdb7fc21125d60.tar.gz
z80uPC-43be150dc6e84f6f6eeb071cd3cdb7fc21125d60.zip
Move sw to sw-old and hw to hw-altium, add kicad files
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diff --git a/sw-old/cpld/address_decoder.nrp b/sw-old/cpld/address_decoder.nrp
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+ispDesignExpert 8.3.02.12_DE_HDL_BASE Copyright ©, 1992-1999,
+Lattice Semiconductor Corporation, All Rights Reserved
+
+Output Files:
+ Netlist File: address_decoder.vho
+ Delay File: address_decoder.sdf
+
+Parsing C:\ISPTOOLS\ISPSYS/dat/sdf.mdl
+Input file: c:\_prossn\cpld\address_decoder.tte
+Reading library information ...
+Mapping to combinational gates
+Mapping to netlist view.
+Utilization Estimate
+ Combinational Macros: 27
+ Flip-Flop and Latch Macros: 0
+ I/O Pads: 24
+Elapsed time: 1 seconds