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author | Nao Pross <naopross@thearcway.org> | 2018-10-30 11:41:24 +0100 |
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committer | Nao Pross <naopross@thearcway.org> | 2018-10-30 11:41:24 +0100 |
commit | 43be150dc6e84f6f6eeb071cd3cdb7fc21125d60 (patch) | |
tree | 541fd3d690c1bdfd7b68d684029a400b80f4aa06 /sw-old/z80/drivers | |
parent | Add datasheets for ATmega328 and 74LS259 (diff) | |
download | z80uPC-43be150dc6e84f6f6eeb071cd3cdb7fc21125d60.tar.gz z80uPC-43be150dc6e84f6f6eeb071cd3cdb7fc21125d60.zip |
Move sw to sw-old and hw to hw-altium, add kicad files
Diffstat (limited to 'sw-old/z80/drivers')
-rw-r--r-- | sw-old/z80/drivers/ctc.c | 6 | ||||
-rw-r--r-- | sw-old/z80/drivers/include/ctc.h | 6 | ||||
-rw-r--r-- | sw-old/z80/drivers/include/pio.h | 52 | ||||
-rw-r--r-- | sw-old/z80/drivers/include/usart.h | 158 | ||||
-rw-r--r-- | sw-old/z80/drivers/makefile | 24 | ||||
-rw-r--r-- | sw-old/z80/drivers/pio.c | 84 | ||||
-rw-r--r-- | sw-old/z80/drivers/usart.c | 91 |
7 files changed, 421 insertions, 0 deletions
diff --git a/sw-old/z80/drivers/ctc.c b/sw-old/z80/drivers/ctc.c new file mode 100644 index 0000000..5ac4254 --- /dev/null +++ b/sw-old/z80/drivers/ctc.c @@ -0,0 +1,6 @@ +#include "ctc.h" + +void ctc_control() +{ + +} diff --git a/sw-old/z80/drivers/include/ctc.h b/sw-old/z80/drivers/include/ctc.h new file mode 100644 index 0000000..80e8b4b --- /dev/null +++ b/sw-old/z80/drivers/include/ctc.h @@ -0,0 +1,6 @@ +#ifndef __CTC_H__ +#define __CTC_H__ + +void ctc_control(); + +#endif /* __CTC_H__ */ diff --git a/sw-old/z80/drivers/include/pio.h b/sw-old/z80/drivers/include/pio.h new file mode 100644 index 0000000..ee968d7 --- /dev/null +++ b/sw-old/z80/drivers/include/pio.h @@ -0,0 +1,52 @@ +#ifndef __PIO_H__ +#define __PIO_H__ + +#include "addresses.h" +#include <stdint.h> + +// DEBUG +#define PIO_ASM_INTERFACE + +// ports +#define PIO_A 0 +#define PIO_B 1 + +// registers +#define PIO_REG_DATA 0 +#define PIO_REG_CTRL 2 + +#define PIO_REG_DATA_A 0 // (PIO_A | PIO_REG_PORT) +#define PIO_REG_DATA_B 1 // (PIO_B | PIO_REG_PORT) +#define PIO_REG_CTRL_A 2 // (PIO_A | PIO_REG_CTRL) +#define PIO_REG_CTRL_B 3 // (PIO_B | PIO_REG_CTRL) + +#define PIO_MODE_BYTE_OUT 0 // mode 0 +#define PIO_MODE_BYTE_IN 1 // mode 1 +#define PIO_MODE_BYTE_BI 2 // mode 2 +#define PIO_MODE_BIT_IO 3 // mode 3 + +#define PIO_INT_DISABLE 0 +#define PIO_INT_ACTIVE_HIGH 2 +#define PIO_INT_AND_MODE 4 +#define PIO_INT_ENABLE 8 + +/* functions used internally to interface with the device */ +inline void _pio_write(uint8_t reg, uint8_t data); +inline uint8_t _pio_read(uint8_t reg); + +/* the last argument is needed only for IO mode */ +void pio_set_mode(int port, int mode, uint8_t io); + +void pio_set_interrupts(int port, int control); +void pio_set_interrupts_mask(int port, int control, uint8_t mask); + +// uint8_t pio_read_data(int port); +uint8_t pio_read(int port); +void pio_write(int port, uint8_t data); + +inline int pio_read_pin(int port, uint8_t pin); +inline void pio_write_pin(int port, uint8_t pin); + +// TODO: implement mode (in/out/both) and interrupt vector + +#endif /* __PIO_H__ */ diff --git a/sw-old/z80/drivers/include/usart.h b/sw-old/z80/drivers/include/usart.h new file mode 100644 index 0000000..05aeb4a --- /dev/null +++ b/sw-old/z80/drivers/include/usart.h @@ -0,0 +1,158 @@ +#ifndef __USART_H__ +#define __USART_H__ + +#include "addresses.h" + +#include <stdint.h> +#include <string.h> + +// baudrate clock divisors +// values from TL16C550C datasheet (table 9 for 1.8432 MHz crystal) +#define USART_BAUDRATE_50 2304 +#define USART_BAUDRATE_75 1536 +#define USART_BAUDRATE_110 1047 +#define USART_BAUDRATE_134_5 857 +#define USART_BAUDRATE_150 768 +#define USART_BAUDRATE_300 384 +#define USART_BAUDRATE_600 192 +#define USART_BAUDRATE_1200 96 +#define USART_BAUDRATE_1800 64 +#define USART_BAUDRATE_2000 58 +#define USART_BAUDRATE_2400 48 +#define USART_BAUDRATE_3600 32 +#define USART_BAUDRATE_4800 24 +#define USART_BAUDRATE_7200 16 +#define USART_BAUDRATE_9600 12 +#define USART_BAUDRATE_19200 6 +#define USART_BAUDRATE_38400 3 +#define USART_BAUDRATE_56000 3 + +// parity +#define USART_PARITY_NONE 0 +#define USART_PARITY_EVEN 1 +#define USART_PARITY_ODD 2 + +// stop bits +#define USART_STOP_BITS_1 10 +#define USART_STOP_BITS_15 15 +#define USART_STOP_BITS_2 20 + +// word lenght +#define USART_WORD_LENGTH_5 0 +#define USART_WORD_LENGTH_6 1 +#define USART_WORD_LENGTH_7 2 +#define USART_WORD_LENGTH_8 3 + +// autoflow +#define USART_AUTOFLOW_ALL 3 +#define USART_AUTOFLOW_CTS 2 +#define USART_AUTOFLOW_OFF 0 + +typedef unsigned int uint; +typedef volatile uint8_t register_t; + +/* stuctures for usart registers */ +struct IER +{ + volatile uint received_data_interrupt :1; + volatile uint transmitter_empty_interrupt :1; + volatile uint receiver_line_status_interrupt :1; + volatile uint modem_status_interrupt :1; + volatile uint reserved :4; +}; + +struct IIR +{ + volatile uint interrupt_pending :1; + volatile uint interrupt_id :3; + volatile uint reserved :2; + volatile uint fifos :2; +}; + +struct FCR +{ + volatile uint fifo_enable :1; + volatile uint receiver_fifo_rst :1; + volatile uint trasmitter_fifo_rst :1; + volatile uint dma_mode_select :1; + volatile uint reserved :1; + volatile uint receiver_trigger :2; +}; + +struct LCR +{ + volatile uint word_length :2; + volatile uint stop_bits :1; + volatile uint parity :1; + volatile uint even_parity :1; + volatile uint stick_parity :1; + volatile uint break_control :1; + volatile uint divisor_latch_access :1; +}; + +struct MCR +{ + volatile uint data_terminal_ready :1; + volatile uint request_to_send :1; + volatile uint out1; + volatile uint out2; + volatile uint loop; + volatile uint autoflow :1; + volatile uint reserved :2; +}; + +struct LSR +{ + volatile uint data_ready :1; + volatile uint overrun_error :1; + volatile uint parity_error :1; + volatile uint framing_error :1; + volatile uint break_interrupt :1; + volatile uint transmitter_holder_empty :1; + volatile uint transmitter_empty :1; + volatile uint fifo_recv_error :1; +}; + +struct MSR +{ + volatile uint delta_cts :1; + volatile uint delta_data_set_ready :1; + volatile uint trailing_edge_ring_indicator :1; + volatile uint delta_data_carrier_detect :1; + volatile uint clear_to_send :1; + volatile uint data_set_ready :1; + volatile uint ring_indicator :1; + volatile uint data_carrier_detect :1; +}; + +/* this structure is only for internal use */ +struct _usart_device +{ + register_t buffer; // also used as LSB for divisor latch + struct IER IER; + struct IIR IIR; + struct FCR FCR; + struct LCR LCR; + struct MCR MCR; + struct LSR LSR; + struct MSR MSR; + register_t scratch; +}; + + +// setup functions (wrappers) +void usart_set_baudrate(uint16_t baudrate); +void usart_set_parity(int mode); +void usart_set_stop_bits(int count); +void usart_set_word_length(int length); +void usart_set_autoflow(int mode); + +inline void usart_init(uint16_t baudrate, int parity, int stop_bits); + +void usart_transmit(uint8_t data); +uint8_t usart_receive(); + +int usart_write(uint8_t *data, size_t size); +int usart_read(uint8_t *buffer, size_t count); + +#endif // __USART__H__ diff --git a/sw-old/z80/drivers/makefile b/sw-old/z80/drivers/makefile new file mode 100644 index 0000000..65ded58 --- /dev/null +++ b/sw-old/z80/drivers/makefile @@ -0,0 +1,24 @@ +# Drivers library + +LIB := build/drivers.a +SOURCES := $(wildcard *.c) +OBJECTS := $(patsubst %.c,build/%.rel,$(SOURCES)) + +CC := sdcc +AR := sdar +CFLAGS := -mz80 -Iinclude -I../arch/include -DDEBUG + +.PHONY: dirs rebuild clean +$(LIB): $(OBJECTS) + $(AR) vrcs $@ $(OBJECTS) + +$(OBJECTS): build/%.rel: %.c $(SOURCES) dirs + $(CC) $(CFLAGS) -c $< -o $@ + +rebuild: clean $(LIB) + +dirs: + mkdir -p build + +clean: + - rm -rd build diff --git a/sw-old/z80/drivers/pio.c b/sw-old/z80/drivers/pio.c new file mode 100644 index 0000000..f396e43 --- /dev/null +++ b/sw-old/z80/drivers/pio.c @@ -0,0 +1,84 @@ +#include "pio.h" + +#ifdef PIO_ASM_INTERFACE +// TODO: set inline +void _pio_write(uint8_t reg, uint8_t data) +{ + __asm + ;; pop function arguments data in h, reg in a (l) + pop hl + ld a, l + ;; add ADDR_DEV_PIO to get the device address + add a, #ADDR_DEV_PIO + ld c, a + ;; load data + out (c), h + __endasm; +} + +inline uint8_t _pio_read(uint8_t reg) +{ + // TODO: check "dec sp" + __asm + ;; pop function argument + dec sp + pop hl + ld a, l + ;; add ADDR_DEV_PIO to get the device address + add a, #ADDR_DEV_PIO + ld c, a + ;; read data + in l, (c) + ret + __endasm; +} + +#else + +inline void _pio_write(uint8_t reg, uint8_t data) +{ + *((uint8_t *) (ADDR_DEV_PIO + reg)) = data; +} + +inline uint8_t _pio_read(uint8_t reg) +{ + return *((uint8_t *) (ADDR_DEV_PIO + reg)); +} + +#endif + +void pio_set_mode(int port, int mode, uint8_t io) +{ + // 0x0F is a control sequence to set mode + _pio_write((PIO_REG_CTRL + port), ((mode << 6) | 0x0F)); + + // this mode requires an additional argument that sets + // a mode for each pin + if (mode == PIO_MODE_BIT_IO) { + _pio_write((PIO_REG_CTRL + port), io); + } +} + +void pio_set_interrupts(int port, int control) +{ + // 0x07 is a control sequence to set interrupts + _pio_write((PIO_REG_CTRL + port), (control<<4 | 0x07)); +} + +void pio_set_interrupts_mask(int port, int control, uint8_t mask) +{ + // 0x17 is a control sequence to set interrupts + // AND interpret the next byte as a bitmask + _pio_write((PIO_REG_CTRL + port),(control | 0x97)); + _pio_write((PIO_REG_CTRL + port), mask); +} + +uint8_t pio_read(int port) +{ + return _pio_read((PIO_REG_DATA + port)); +} + +void pio_write(int port, uint8_t data) +{ + _pio_write((PIO_REG_DATA + port), data); +} diff --git a/sw-old/z80/drivers/usart.c b/sw-old/z80/drivers/usart.c new file mode 100644 index 0000000..9a5ee38 --- /dev/null +++ b/sw-old/z80/drivers/usart.c @@ -0,0 +1,91 @@ +#include "usart.h" + +static volatile struct _usart_device *_usart = ((struct _usart_device *) ADDR_DEV_USART); + +void usart_set_baudrate(uint16_t baudrate) +{ + // enable latch access + _usart->LCR.divisor_latch_access = 1; + _usart->buffer = 0x00FF & baudrate; // LSBs + memcpy(&_usart->IER, &(baudrate >>8), 1); + // _usart->IER = 0x00FF & (baudrate >> 8); // MSBs + _usart->LCR.divisor_latch_access = 0; +} + +void usart_set_parity(int mode) +{ + if (mode == USART_PARITY_EVEN) { + _usart->LCR.even_parity = 1; + } + else if (mode == USART_PARITY_ODD) { + _usart->LCR.even_parity = 0; + } + + _usart->LCR.parity = (mode == USART_PARITY_NONE) ? 0 : 1; +} + +void usart_set_stop_bits(int count) +{ + _usart->LCR.stop_bits = (count == USART_STOP_BITS_1) ? 0 : 1; +} + +void usart_word_length(int length) +{ + _usart->LCR.word_length = length; +} + +void usart_set_autoflow(int mode) +{ + _usart->MCR.autoflow = (mode == USART_AUTOFLOW_OFF) ? 0 : 1; + _usart->MCR.data_terminal_ready = (mode == USART_AUTOFLOW_ALL); +} + +inline void usart_init(uint16_t baudrate, int parity, int stop_bits) +{ + usart_set_baudrate(baudrate); + usart_set_parity(parity); + usart_set_stop_bits(stop_bits); + usart_set_autoflow(USART_AUTOFLOW_OFF); +} + +void usart_transmit(uint8_t data) +{ + _usart->buffer = data; + while (_usart->LSR.transmitter_holder_empty == 0); // wait +} + +uint8_t usart_receive() +{ + return _usart->buffer; +} + +int usart_write(uint8_t *data, size_t size) +{ + uint8_t *dp = data; + + while (size--) { + _usart->buffer = *(dp++); + while (_usart->LSR.transmitter_empty); + } + + // TODO: do something that actually counts for sent bytes + return size; +} + +int usart_read(uint8_t *buffer, size_t count) +{ + uint8_t *bp = buffer; + size_t read_count = 0; + + while (count--) { + *(bp++) = _usart->buffer; + // check for errors + if (_usart->LSR.framing_error || _usart->LSR.parity_error) { + bp--; // delete last byte (?) + } else { + read_count++; + } + } + + return read_count; +} |