diff options
| author | Nao Pross <naopross@thearcway.org> | 2017-11-23 14:34:55 +0100 |
|---|---|---|
| committer | Nao Pross <naopross@thearcway.org> | 2017-11-23 14:34:55 +0100 |
| commit | 141137dfe5bdc7400d5cc1ad388b670f9f2e9446 (patch) | |
| tree | bef58de3c44787dadb22ec9cf452a3606ddd6708 /sw/cpld/ADDRESS_DECODER.TCL | |
| parent | Improvements in PIO driver, pio test rewritten in inline asm (diff) | |
| download | z80uPC-141137dfe5bdc7400d5cc1ad388b670f9f2e9446.tar.gz z80uPC-141137dfe5bdc7400d5cc1ad388b670f9f2e9446.zip | |
update cpld files from VHDL dev machine and delete programmer code (unused)
Diffstat (limited to 'sw/cpld/ADDRESS_DECODER.TCL')
| -rwxr-xr-x | sw/cpld/ADDRESS_DECODER.TCL | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/sw/cpld/ADDRESS_DECODER.TCL b/sw/cpld/ADDRESS_DECODER.TCL new file mode 100755 index 0000000..e83cb1f --- /dev/null +++ b/sw/cpld/ADDRESS_DECODER.TCL @@ -0,0 +1,37 @@ +#-- Lattice Semiconductor Corporation Ltd.
+#-- Synplify OEM project file .\ADDRESS_DECODER.TCL
+#-- Written on Thu Nov 23 11:54:33 2017
+
+
+#-- begin a new section
+project -new
+
+#-- Device options
+set_option -technology mach
+
+#-- add_file options
+add_file -vhdl -lib work "address_decoder.vhd"
+
+#-- top module name
+set_option -top_module ADDRESS_DECODER
+
+#simulation options
+set_option -write_verilog true
+set_option -write_vhdl true
+
+#-- set result format/file last
+project -result_file "ADDRESS_DECODER.edi"
+
+#-- error message log file
+project -log_file ADDRESS_DECODER.log
+
+#-- let's save it
+project -save ADDRESS_DECODER.tc_
+
+#-- run Synplify
+project -run
+
+#-- **************************************************
+
+#-- exit from Synplify
+exit
|