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| author | Nao Pross <naopross@thearcway.org> | 2017-11-23 14:34:55 +0100 |
|---|---|---|
| committer | Nao Pross <naopross@thearcway.org> | 2017-11-23 14:34:55 +0100 |
| commit | 141137dfe5bdc7400d5cc1ad388b670f9f2e9446 (patch) | |
| tree | bef58de3c44787dadb22ec9cf452a3606ddd6708 /sw/cpld/syndos.env | |
| parent | Improvements in PIO driver, pio test rewritten in inline asm (diff) | |
| download | z80uPC-141137dfe5bdc7400d5cc1ad388b670f9f2e9446.tar.gz z80uPC-141137dfe5bdc7400d5cc1ad388b670f9f2e9446.zip | |
update cpld files from VHDL dev machine and delete programmer code (unused)
Diffstat (limited to 'sw/cpld/syndos.env')
| -rwxr-xr-x | sw/cpld/syndos.env | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/sw/cpld/syndos.env b/sw/cpld/syndos.env new file mode 100755 index 0000000..2977a55 --- /dev/null +++ b/sw/cpld/syndos.env @@ -0,0 +1,24 @@ +DIOEDA_AppNotes=C:\ISPTOOLS\ISPSYS\APPNOTES
+DIOEDA_Bin=C:\ISPTOOLS\ISPSYS\BIN
+DIOEDA_Config=C:\ISPTOOLS\ISPSYS\CONFIG
+DIOEDA_Examples=C:\ISPTOOLS\ISPSYS\EXAMPLES
+DIOEDA_License=C:\ISPTOOLS\ISPCOMP\LICENSE
+DIOEDA_MachPath=C:\ISPTOOLS\ISPSYS\BIN
+DIOEDA_Manuals=C:\ISPTOOLS\ISPSYS\MANUALS
+DIOEDA_ModelsimPath=C:\ISPTOOLS\MODELSIM\WIN32LOEM
+DIOEDA_PDSPath=C:\ISPTOOLS\ISPCOMP
+DIOEDA_Root=C:\ISPTOOLS\ISPSYS
+DIOEDA_SpectrumPath=C:\ISPTOOLS\SPECTRUM
+DIOEDA_SynplifyPath=C:\ISPTOOLS\SYNPBASE
+DIOEDA_Tutorial=C:\ISPTOOLS\ISPSYS\TUTORIAL
+DIOEDA_ABEL5DEV=C:\ISPTOOLS\ISPSYS\LIB5
+DIOEDA_ProductName=ispDesignEXPERT
+DIOEDA_ProductPrefix=SYN
+DIOEDA_ProductTitle=ispDesignEXPERT
+DIOEDA_ProductType=HDL-BASE
+DIOEDA_ProductVersion=8.3.02.12_DE_HDL_BASE
+DIOEDA_TimingSim=LatticeLogicSim
+DIOEDA_CONTEXT=8.3
+DIOPRODUCT=ispDesignEXPERT
+ABEL5DEV=C:\ISPTOOLS\ISPSYS\LIB5
+PATH=C:\ISPTOOLS\ISPSYS\BIN
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