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author | Nao Pross <naopross@thearcway.org> | 2017-11-23 14:34:55 +0100 |
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committer | Nao Pross <naopross@thearcway.org> | 2017-11-23 14:34:55 +0100 |
commit | 141137dfe5bdc7400d5cc1ad388b670f9f2e9446 (patch) | |
tree | bef58de3c44787dadb22ec9cf452a3606ddd6708 /sw/cpld_test/cpld_test.lci | |
parent | Improvements in PIO driver, pio test rewritten in inline asm (diff) | |
download | z80uPC-141137dfe5bdc7400d5cc1ad388b670f9f2e9446.tar.gz z80uPC-141137dfe5bdc7400d5cc1ad388b670f9f2e9446.zip |
update cpld files from VHDL dev machine and delete programmer code (unused)
Diffstat (limited to 'sw/cpld_test/cpld_test.lci')
-rw-r--r-- | sw/cpld_test/cpld_test.lci | 63 |
1 files changed, 0 insertions, 63 deletions
diff --git a/sw/cpld_test/cpld_test.lci b/sw/cpld_test/cpld_test.lci deleted file mode 100644 index 62d7d9d..0000000 --- a/sw/cpld_test/cpld_test.lci +++ /dev/null @@ -1,63 +0,0 @@ -[Device] -Family=M4A5; -PartNumber=M4A5-32/32-10JC; -Package=44PLCC; -PartType=M4A5-32/32; -Speed=-10; -Operating_condition=COM; -Status=Production; - -[Revision] -Parent=m4a5.lci; -DATE=06/01/2017; -TIME=13:49:11; -Source_Format=Pure_VHDL; -Synthesis=Synplify; - -[Ignore Assignments] - -[Clear Assignments] - -[Backannotate Assignments] - -[Global Constraints] - -[Location Assignments] -Layer = Off; - -[Group Assignments] -Layer = Off; - -[Resource Reservations] -Layer = Off; - -[Fitter Report Format] - -[Power] - -[Source Constraint Option] - -[Fast Bypass] - -[OSM Bypass] - -[Input Registers] - -[Netlist/Delay Format] - -[IO Types] -Layer = off; - -[Pullup] - -[Slewrate] - -[Region] - -[Timing Constraints] - -[HSI Attributes] - -[Input Delay] - - |