new components list and cpld test unit

1 files changed, 15 insertions, 0 deletions

diff --git a/sw/cpld_test/cpld_test.vhd b/sw/cpld_test/cpld_test.vhd
new file mode 100644
index 0000000..b1161e9
--- /dev/null
+++ b/sw/cpld_test/cpld_test.vhd
@@ -0,0 +1,15 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_arith.all;
+use ieee.std_logic_unsigned.all;
+
+entity cpld_test is
+	IN_PIN: in std_logic;
+	OUT_PIN: out std_logic;
+end;
+
+architecture behavioral of cpld_test is
+begin
+	OUT_PIN <= not(IN_PIN);
+end behavioral;
+