Test units are now in their own folder 'z80_test', add programmer cli interface

54 files changed, 3769 insertions, 347 deletions

diff --git a/sw/programmer/linux/config.h b/sw/programmer/linux/config.h
new file mode 100644
index 0000000..d319f43
--- /dev/null
+++ b/sw/programmer/linux/config.h
@@ -0,0 +1,26 @@
+/* config.h.  Generated from config.h.in by configure.  */
+/* config.h.in.  Generated from configure.ac by autoheader.  */
+
+/* Name of package */
+#define PACKAGE "z80prog"
+
+/* Define to the address where bug reports for this package should be sent. */
+#define PACKAGE_BUGREPORT "naopross@tharcway.org"
+
+/* Define to the full name of this package. */
+#define PACKAGE_NAME "z80prog"
+
+/* Define to the full name and version of this package. */
+#define PACKAGE_STRING "z80prog 0.1"
+
+/* Define to the one symbol short name of this package. */
+#define PACKAGE_TARNAME "z80prog"
+
+/* Define to the home page for this package. */
+#define PACKAGE_URL ""
+
+/* Define to the version of this package. */
+#define PACKAGE_VERSION "0.1"
+
+/* Version number of package */
+#define VERSION "0.1"
diff --git a/sw/programmer/linux/src/main.c b/sw/programmer/linux/src/main.c
index 769992a..1bfd359 100644
--- a/sw/programmer/linux/src/main.c
+++ b/sw/programmer/linux/src/main.c
@@ -4,10 +4,64 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stdbool.h>
+#include <unistd.h>
+#include <errno.h>
+
+void out(const char *msg)
+{
+    printf("%s", msg);
+}
 
 int main(int argc, char *argv[])
 {
-    ui_init(&argc, &argv);
+    int opt;
+    int use_ui = 0;
+
+    unsigned long baudrate;
+    char *file, *device, *baud;
+
+    file = device = baud = NULL;
+
+    while ((opt = getopt(argc, argv, "gf:d:b:")) != -1) {
+        switch (opt) {
+        case 'g':
+            use_ui = 1;
+            break;
+        case 'f':
+            file = optarg;
+            break;
+        case 'd':
+            device = optarg;
+            break;
+        case 'b':
+            baud = optarg;
+            break;
+        }
+    }
+
+    if (use_ui) {
+        ui_init(&argc, &argv);
+        return 0;
+    }
+
+    if (file == NULL || device == NULL || baud == NULL) {
+        perror("Missing argument\n");
+        return -1;
+    }
+
+    baudrate = strtoul(baud, NULL, 0);
+    if (errno == ERANGE) {
+        perror("Invalid baudrate\n");
+        return -1;
+    }
+
+    if (flash_open(device, baudrate) < 0) {
+        perror("Failed to open device\n");
+        return -2;
+    }
+
+    flash_write(file, out);
+    flash_close();
+
     return 0;
 }
-
diff --git a/sw/programmer/linux/src/z80prog b/sw/programmer/linux/src/z80prog
new file mode 100755
index 0000000..9787e67
--- /dev/null
+++ b/sw/programmer/linux/src/z80prog
diff --git a/sw/z80/crt0.rel b/sw/z80/crt0.rel
new file mode 100644
index 0000000..880fd57
--- /dev/null
+++ b/sw/z80/crt0.rel
@@ -0,0 +1,86 @@
+XL2
+H 14 areas 5 global symbols
+M crt0
+S .__.ABS. Def0000
+S _kmain Ref0000
+A _CODE size A flags 0 addr 0
+S __clock Def0000
+S _exit Def0004
+A _HEADER size 0 flags 8 addr 0
+A _HEADER0 size 3 flags 8 addr 0
+A _HEADER1 size 2 flags 8 addr 8
+A _HEADER2 size 2 flags 8 addr 10
+A _HEADER3 size 2 flags 8 addr 18
+A _HEADER4 size 2 flags 8 addr 20
+A _HEADER5 size 2 flags 8 addr 28
+A _HEADER6 size 2 flags 8 addr 30
+A _HEADER7 size 2 flags 8 addr 38
+A _HEADER8 size C flags 8 addr 100
+A _HOME size 0 flags 0 addr 0
+A _INITIALIZER size 0 flags 0 addr 0
+A _GSINIT size 6 flags 0 addr 0
+S gsinit Def0000
+A _GSFINAL size 1 flags 0 addr 0
+A _DATA size 0 flags 0 addr 0
+A _INITIALIZED size 0 flags 0 addr 0
+A _BSEG size 0 flags 0 addr 0
+A _BSS size 0 flags 0 addr 0
+A _HEAP size 0 flags 0 addr 0
+T 00 00
+R 00 00 02 00
+T 00 00 C3 00 01
+R 00 00 02 00 00 03 0A 00
+T 08 00
+R 00 00 03 00
+T 08 00 ED 4D
+R 00 00 03 00
+T 10 00
+R 00 00 04 00
+T 10 00 ED 4D
+R 00 00 04 00
+T 18 00
+R 00 00 05 00
+T 18 00 ED 4D
+R 00 00 05 00
+T 20 00
+R 00 00 06 00
+T 20 00 ED 4D
+R 00 00 06 00
+T 28 00
+R 00 00 07 00
+T 28 00 ED 4D
+R 00 00 07 00
+T 30 00
+R 00 00 08 00
+T 30 00 ED 4D
+R 00 00 08 00
+T 38 00
+R 00 00 09 00
+T 38 00 ED 4D
+R 00 00 09 00
+T 00 01
+R 00 00 0A 00
+T 00 01
+R 00 00 0A 00
+T 00 01 31 FF FF CD 00 00 CD 00 00 C3 04 00
+R 00 00 0A 00 00 06 0D 00 02 09 01 00 00 0C 00 00
+T 00 00
+R 00 00 00 00
+T 00 00 3E 02 CF C9
+R 00 00 00 00
+T 04 00
+R 00 00 00 00
+T 04 00 3E 00 CF
+R 00 00 00 00
+T 07 00
+R 00 00 00 00
+T 07 00 76 18 FD
+R 00 00 00 00
+T 00 00
+R 00 00 0D 00
+T 00 00 78 B1 28 02 ED B0
+R 00 00 0D 00
+T 06 00
+R 00 00 0D 00
+T 00 00 C9
+R 00 00 0E 00
diff --git a/sw/z80/kernel/drivers/ctc.c b/sw/z80/kernel/drivers/ctc.c
index e23ed8e..841202a 100644
--- a/sw/z80/kernel/drivers/ctc.c
+++ b/sw/z80/kernel/drivers/ctc.c
@@ -1 +1,6 @@
-#include "drivers/ctc.h"
\ No newline at end of file
+#include "drivers/ctc.h"
+
+void ctc_control()
+{
+
+}
diff --git a/sw/z80/kernel/include/drivers/ctc.h b/sw/z80/kernel/include/drivers/ctc.h
index 488e02b..80e8b4b 100644
--- a/sw/z80/kernel/include/drivers/ctc.h
+++ b/sw/z80/kernel/include/drivers/ctc.h
@@ -1,6 +1,6 @@
 #ifndef __CTC_H__
 #define __CTC_H__
 
-void ctc_control()
+void ctc_control();
 
-#endif /* __CTC_H__ */
\ No newline at end of file
+#endif /* __CTC_H__ */
diff --git a/sw/z80/kernel/memory.c b/sw/z80/kernel/memory.c
index cda62ca..1b2cc76 100644
--- a/sw/z80/kernel/memory.c
+++ b/sw/z80/kernel/memory.c
@@ -17,12 +17,14 @@ int mmu_write_table(void)
 
 int page_new(void)
 {
-    int i, addr, used;
+    int i, used;
+    uint16_t addr;
+
     for (addr = ADDR_PAGE_FIRST; addr < ADDR_PAGE_LAST; addr += PAGE_SIZE) {
         used = 0;
 
         for (i = 0; i < PAGES_MAX_COUNT; i++) {
-            if (page_map[i].addr == addr) {
+            if (pages_table[i].addr == addr) {
                 used = 1;
                 break;
             }
diff --git a/sw/z80/kernel/process.c b/sw/z80/kernel/process.c
index 049c88c..7d8db89 100644
--- a/sw/z80/kernel/process.c
+++ b/sw/z80/kernel/process.c
@@ -33,15 +33,17 @@ int fork(void)
         return -1;
 
 
-    for (i = 0; i < current_proc.pages; i++) {
+    for (i = 0; i < current_proc->pages; i++) {
         p = page_new();
 
         if (p == -1) {
-            
             return -2;
         }
 
-        proc_table[child_pid].page[i] = p;
+        // TODO: use memcpy()
+        // SDCC does not allow assignemnts of structs
+
+        // proc_table[child_pid].page[i] = p;
     }
 }
 
diff --git a/sw/z80_test/ctc.c b/sw/z80_test/ctc.c
deleted file mode 100644
index 3a4e7d5..0000000
--- a/sw/z80_test/ctc.c
+++ /dev/null
@@ -1,7 +0,0 @@
-#include "ctc.h"
-
-void ctc_control()
-{
-    
-}
-
diff --git a/sw/z80_test/ctc.h b/sw/z80_test/ctc.h
deleted file mode 100644
index c6b3150..0000000
--- a/sw/z80_test/ctc.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __CTC_H__
-#define __CTC_H__
-
-void ctc_control();
-
-#endif /* __CTC_H__ */
\ No newline at end of file
diff --git a/sw/z80_test/pio.c b/sw/z80_test/pio.c
deleted file mode 100644
index 5ca9149..0000000
--- a/sw/z80_test/pio.c
+++ /dev/null
@@ -1,40 +0,0 @@
-#include "pio.h"
-
-static uint8_t *pio_port = (uint8_t *) ADDR_DEV_PIO;
-static uint8_t *pio_ctrl = (uint8_t *) (ADDR_DEV_PIO + 2);
-
-inline void _pio_data(int port, uint8_t data)
-{
-    *(pio_port + port) = data;
-}
-
-inline void _pio_control(int port, uint8_t cmd)
-{
-    *(pio_ctrl + port) = cmd;
-}
-
-void pio_set_mode(int port, int mode, uint8_t io)
-{
-    // 0x0F is a control sequence to set mode
-    _pio_control(port, ((mode << 6) | 0x0F));
-
-    // this mode requires an additional argument that sets
-    // a mode for each pin
-    if (mode == PIO_MODE_BIT_IO) {
-        _pio_control(port, io);
-    }
-}
-
-void pio_set_interrupts(int port, int control)
-{
-    // 0x07 is a control sequence to set interrupts
-    _pio_control(port, (control | 0x07));
-}
-
-void pio_set_interrupts_mask(int port, int control, uint8_t mask)
-{
-    // 0x17 is a control sequence to set interrupts
-    // and to interpret the next byte as a mask
-    _pio_control(port, (control | 0x17));
-    _pio_control(port, mask);
-}
diff --git a/sw/z80_test/pio.h b/sw/z80_test/pio.h
deleted file mode 100644
index 0df2ed0..0000000
--- a/sw/z80_test/pio.h
+++ /dev/null
@@ -1,37 +0,0 @@
-#ifndef __PIO_H__
-#define __PIO_H__
-
-#include "devices.h"
-#include "types.h"
-
-#define PIO_A       0
-#define PIO_B       1
-
-#define PIO_MODE_BYTE_IN   0
-#define PIO_MODE_BYTE_OUT  1
-#define PIO_MODE_BYTE_BI   2
-#define PIO_MODE_BIT_IO    3
-
-#define PIO_INT_ACTIVE_HIGH     (1<<5)
-#define PIO_INT_AND_MODE        (1<<6)
-#define PIO_INT_ENABLE          (1<<7)
-
-
-inline void _pio_data(int port, uint8_t data);
-inline void _pio_control(int port, uint8_t cmd);
-
-void pio_set_mode(int port, int mode, uint8_t io);
-
-void pio_set_interrupts(int port, int control);
-void pio_set_interrupts_mask(int port, int control, uint8_t mask);
-
-// uint8_t pio_read_data(int port);
-uint8_t pio_read(int port);
-void pio_write(int port, uint8_t data);
-
-inline int pio_read_pin(int port, uint8_t pin);
-inline void pio_write_pin(int port, uint8_t pin);
-
-// TODO: implement mode (in/out/both) and interrupt vector
-
-#endif // __PIO_H__
diff --git a/sw/z80_test/usart.c b/sw/z80_test/usart.c
deleted file mode 100644
index 9ec6dbd..0000000
--- a/sw/z80_test/usart.c
+++ /dev/null
@@ -1,91 +0,0 @@
-#include "usart.h"
-
-static struct _usart_device *_usart = (struct _usart_device *) ADDR_DEV_USART;
-
-void usart_set_baudrate(uint16_t baudrate)
-{
-    // enable latch access
-    _usart->LCR.divisor_latch_access = 1;
-    _usart->buffer = 0x00FF & baudrate; // LSBs
-    memcpy(&_usart->IER, &(baudrate >>8), 1);
-    // _usart->IER    = 0x00FF & (baudrate >> 8); // MSBs
-    _usart->LCR.divisor_latch_access = 0;
-}
-
-void usart_set_parity(int mode)
-{
-    if (mode == USART_PARITY_EVEN) {
-        _usart->LCR.even_parity = 1;
-    }
-    else if (mode == USART_PARITY_ODD) {
-        _usart->LCR.even_parity = 0;
-    }
-
-     _usart->LCR.parity = (mode == USART_PARITY_NONE) ? 0 : 1;
-}
-
-void usart_set_stop_bits(int count)
-{
-    _usart->LCR.stop_bits = (count == USART_STOP_BITS_1) ? 0 : 1;
-}
-
-void usart_word_length(int length)
-{
-    _usart->LCR.word_length = length;
-}
-
-void usart_set_autoflow(int mode)
-{
-    _usart->MCR.autoflow = (mode == USART_AUTOFLOW_OFF) ? 0 : 1;
-    _usart->MCR.data_terminal_ready = (mode == USART_AUTOFLOW_ALL);
-}
-
-inline void usart_init(uint16_t baudrate, int parity, int stop_bits)
-{
-    usart_set_baudrate(baudrate);
-    usart_set_parity(parity);
-    usart_set_stop_bits(stop_bits);
-    usart_set_autoflow(USART_AUTOFLOW_OFF);
-}
-
-void usart_transmit(uint8_t data)
-{
-    _usart->buffer = data;
-    while (_usart->LSR.transmitter_holder_empty == 0); // wait
-}
-
-uint8_t usart_receive()
-{
-    return _usart->buffer;
-}
-
-int usart_write(uint8_t *data, size_t size)
-{
-    uint8_t *dp = data;
-
-    while (size--) {
-        _usart->buffer = *(dp++);
-        while (_usart->LSR.transmitter_empty);
-    }
-
-    // TODO: do something that actually counts for sent bytes 
-    return size;
-}
-
-int usart_read(uint8_t *buffer, size_t count)
-{
-    uint8_t *bp = buffer;
-    size_t read_count = 0;
-
-    while (count--) {
-        *(bp++) = _usart->buffer;
-        // check for errors
-        if (_usart->LSR.framing_error || _usart->LSR.parity_error) {
-            bp--; // delete last byte (?)
-        } else {
-            read_count++;
-        }
-    }
-
-    return read_count;
-}
diff --git a/sw/z80_test/usart.h b/sw/z80_test/usart.h
deleted file mode 100644
index b85ee3e..0000000
--- a/sw/z80_test/usart.h
+++ /dev/null
@@ -1,155 +0,0 @@
-#ifndef __USART_H__
-#define __USART_H__
-
-#include "types.h"
-#include "devices.h"
-
-#include "string.h"
-
-// baudrate clock divisors 
-// values from TL16C550C datasheet (table 9 for 1.8432 MHz crystal)
-#define USART_BAUDRATE_50       2304
-#define USART_BAUDRATE_75       1536
-#define USART_BAUDRATE_110      1047
-#define USART_BAUDRATE_134_5    857
-#define USART_BAUDRATE_150      768
-#define USART_BAUDRATE_300      384
-#define USART_BAUDRATE_600      192
-#define USART_BAUDRATE_1200     96
-#define USART_BAUDRATE_1800     64
-#define USART_BAUDRATE_2000     58
-#define USART_BAUDRATE_2400     48
-#define USART_BAUDRATE_3600     32
-#define USART_BAUDRATE_4800     24
-#define USART_BAUDRATE_7200     16
-#define USART_BAUDRATE_9600     12
-#define USART_BAUDRATE_19200    6
-#define USART_BAUDRATE_38400    3
-#define USART_BAUDRATE_56000    3
-
-// parity
-#define USART_PARITY_NONE       0
-#define USART_PARITY_EVEN       1
-#define USART_PARITY_ODD        2
-
-// stop bits
-#define USART_STOP_BITS_1       10
-#define USART_STOP_BITS_15      15
-#define USART_STOP_BITS_2       20
-
-// word lenght
-#define USART_WORD_LENGTH_5     0
-#define USART_WORD_LENGTH_6     1
-#define USART_WORD_LENGTH_7     2
-#define USART_WORD_LENGTH_8     3
-
-// autoflow
-#define USART_AUTOFLOW_ALL      3
-#define USART_AUTOFLOW_CTS      2
-#define USART_AUTOFLOW_OFF      0
-
-/* stuctures for usart registers */
-struct IER 
-{
-    volatile uint received_data_interrupt :1;
-    volatile uint transmitter_empty_interrupt :1;
-    volatile uint receiver_line_status_interrupt :1;
-    volatile uint modem_status_interrupt :1;
-    volatile uint reserved :4;
-};
-
-struct IIR
-{
-    volatile uint interrupt_pending :1;
-    volatile uint interrupt_id :3;
-    volatile uint reserved :2;
-    volatile uint fifos :2;
-};
-
-struct FCR
-{
-    volatile uint fifo_enable :1;
-    volatile uint receiver_fifo_rst :1;
-    volatile uint trasmitter_fifo_rst :1;
-    volatile uint dma_mode_select :1;
-    volatile uint reserved :1;
-    volatile uint receiver_trigger :2;
-};
-
-struct LCR
-{
-    volatile uint word_length :2;
-    volatile uint stop_bits :1;
-    volatile uint parity :1;
-    volatile uint even_parity :1;
-    volatile uint stick_parity :1;
-    volatile uint break_control :1;
-    volatile uint divisor_latch_access :1;
-};
-
-struct MCR
-{
-    volatile uint data_terminal_ready :1;
-    volatile uint request_to_send :1;
-    volatile uint out1;
-    volatile uint out2;
-    volatile uint loop;
-    volatile uint autoflow :1;
-    volatile uint reserved :2;
-};
-
-struct LSR 
-{
-    volatile uint data_ready :1;
-    volatile uint overrun_error :1;
-    volatile uint parity_error :1;
-    volatile uint framing_error :1;
-    volatile uint break_interrupt :1;
-    volatile uint transmitter_holder_empty :1;
-    volatile uint transmitter_empty :1;
-    volatile uint fifo_recv_error :1;
-};
-
-struct MSR
-{
-    volatile uint delta_cts :1;
-    volatile uint delta_data_set_ready :1;
-    volatile uint trailing_edge_ring_indicator :1;
-    volatile uint delta_data_carrier_detect :1;
-    volatile uint clear_to_send :1;
-    volatile uint data_set_ready :1;
-    volatile uint ring_indicator :1;
-    volatile uint data_carrier_detect :1;
-};
-
-/* this structure is only for internal usage */
-struct _usart_device
-{
-    register_t buffer;  // also used as LSB for divisor latch
-    struct IER IER;
-    struct IIR IIR;
-    struct FCR FCR;
-    struct LCR LCR;
-    struct MCR MCR;
-    struct LSR LSR;
-    struct MSR MSR;
-    register_t scratch;
-};
-
-
-// setup functions (wrappers)
-void usart_set_baudrate(uint16_t baudrate);
-void usart_set_parity(int mode);
-void usart_set_stop_bits(int count);
-void usart_set_word_length(int length);
-void usart_set_autoflow(int mode);
-
-inline void usart_init(uint16_t baudrate, int parity, int stop_bits); 
-
-void usart_transmit(uint8_t data);
-uint8_t usart_receive();
-
-int usart_write(uint8_t *data, size_t size);
-int usart_read(uint8_t *buffer, size_t count);
-
-#endif // __USART__H__
diff --git a/sw/z80_tests/ram/build/crt0.rel b/sw/z80_tests/ram/build/crt0.rel
new file mode 100644
index 0000000..cce6a25
--- /dev/null
+++ b/sw/z80_tests/ram/build/crt0.rel
@@ -0,0 +1,70 @@
+XL2
+H 14 areas 3 global symbols
+M crt0
+S _main Ref0000
+S .__.ABS. Def0000
+A _CODE size 3 flags 0 addr 0
+S _exit Def0000
+A _HEADER size 0 flags 8 addr 0
+A _HEADER0 size 3 flags 8 addr 0
+A _HEADER1 size 2 flags 8 addr 8
+A _HEADER2 size 2 flags 8 addr 10
+A _HEADER3 size 2 flags 8 addr 18
+A _HEADER4 size 2 flags 8 addr 20
+A _HEADER5 size 2 flags 8 addr 28
+A _HEADER6 size 2 flags 8 addr 30
+A _HEADER7 size 2 flags 8 addr 38
+A _HEADER8 size 9 flags 8 addr 100
+A _HOME size 0 flags 0 addr 0
+A _INITIALIZER size 0 flags 0 addr 0
+A _GSINIT size 0 flags 0 addr 0
+A _GSFINAL size 0 flags 0 addr 0
+A _DATA size 0 flags 0 addr 0
+A _INITIALIZED size 0 flags 0 addr 0
+A _BSEG size 0 flags 0 addr 0
+A _BSS size 0 flags 0 addr 0
+A _HEAP size 0 flags 0 addr 0
+T 00 00
+R 00 00 02 00
+T 00 00 C3 00 01
+R 00 00 02 00 00 03 0A 00
+T 08 00
+R 00 00 03 00
+T 08 00 ED 4D
+R 00 00 03 00
+T 10 00
+R 00 00 04 00
+T 10 00 ED 4D
+R 00 00 04 00
+T 18 00
+R 00 00 05 00
+T 18 00 ED 4D
+R 00 00 05 00
+T 20 00
+R 00 00 06 00
+T 20 00 ED 4D
+R 00 00 06 00
+T 28 00
+R 00 00 07 00
+T 28 00 ED 4D
+R 00 00 07 00
+T 30 00
+R 00 00 08 00
+T 30 00 ED 4D
+R 00 00 08 00
+T 38 00
+R 00 00 09 00
+T 38 00 ED 4D
+R 00 00 09 00
+T 00 01
+R 00 00 0A 00
+T 00 01
+R 00 00 0A 00
+T 00 01 31 FF FF CD 00 00 C3 00 00
+R 00 00 0A 00 02 06 00 00 00 09 00 00
+T 00 00
+R 00 00 00 00
+T 00 00
+R 00 00 00 00
+T 00 00 76 18 FD
+R 00 00 00 00
diff --git a/sw/z80_tests/ram/build/main.asm b/sw/z80_tests/ram/build/main.asm
new file mode 100644
index 0000000..f3b8add
--- /dev/null
+++ b/sw/z80_tests/ram/build/main.asm
@@ -0,0 +1,59 @@
+;--------------------------------------------------------
+; File Created by SDCC : free open source ANSI-C Compiler
+; Version 3.6.0 #9615 (Linux)
+;--------------------------------------------------------
+	.module main
+	.optsdcc -mz80
+	
+;--------------------------------------------------------
+; Public variables in this module
+;--------------------------------------------------------
+	.globl _main
+;--------------------------------------------------------
+; special function registers
+;--------------------------------------------------------
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+	.area _DATA
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+	.area _INITIALIZED
+;--------------------------------------------------------
+; absolute external ram data
+;--------------------------------------------------------
+	.area _DABS (ABS)
+;--------------------------------------------------------
+; global & static initialisations
+;--------------------------------------------------------
+	.area _HOME
+	.area _GSINIT
+	.area _GSFINAL
+	.area _GSINIT
+;--------------------------------------------------------
+; Home
+;--------------------------------------------------------
+	.area _HOME
+	.area _HOME
+;--------------------------------------------------------
+; code
+;--------------------------------------------------------
+	.area _CODE
+;main.c:2: void main(void)
+;	---------------------------------
+; Function main
+; ---------------------------------
+_main::
+;main.c:10: while (1) {
+	ld	c,#0x00
+00102$:
+;main.c:11: *mem = j++;
+	ld	b,c
+	inc	c
+	ld	hl,#0x8200
+	ld	(hl),b
+	jr	00102$
+	.area _CODE
+	.area _INITIALIZER
+	.area _CABS (ABS)
diff --git a/sw/z80_tests/ram/build/main.lst b/sw/z80_tests/ram/build/main.lst
new file mode 100644
index 0000000..17142d4
--- /dev/null
+++ b/sw/z80_tests/ram/build/main.lst
@@ -0,0 +1,59 @@
+                              1 ;--------------------------------------------------------
+                              2 ; File Created by SDCC : free open source ANSI-C Compiler
+                              3 ; Version 3.6.0 #9615 (Linux)
+                              4 ;--------------------------------------------------------
+                              5 	.module main
+                              6 	.optsdcc -mz80
+                              7 	
+                              8 ;--------------------------------------------------------
+                              9 ; Public variables in this module
+                             10 ;--------------------------------------------------------
+                             11 	.globl _main
+                             12 ;--------------------------------------------------------
+                             13 ; special function registers
+                             14 ;--------------------------------------------------------
+                             15 ;--------------------------------------------------------
+                             16 ; ram data
+                             17 ;--------------------------------------------------------
+                             18 	.area _DATA
+                             19 ;--------------------------------------------------------
+                             20 ; ram data
+                             21 ;--------------------------------------------------------
+                             22 	.area _INITIALIZED
+                             23 ;--------------------------------------------------------
+                             24 ; absolute external ram data
+                             25 ;--------------------------------------------------------
+                             26 	.area _DABS (ABS)
+                             27 ;--------------------------------------------------------
+                             28 ; global & static initialisations
+                             29 ;--------------------------------------------------------
+                             30 	.area _HOME
+                             31 	.area _GSINIT
+                             32 	.area _GSFINAL
+                             33 	.area _GSINIT
+                             34 ;--------------------------------------------------------
+                             35 ; Home
+                             36 ;--------------------------------------------------------
+                             37 	.area _HOME
+                             38 	.area _HOME
+                             39 ;--------------------------------------------------------
+                             40 ; code
+                             41 ;--------------------------------------------------------
+                             42 	.area _CODE
+                             43 ;main.c:2: void main(void)
+                             44 ;	---------------------------------
+                             45 ; Function main
+                             46 ; ---------------------------------
+   0000                      47 _main::
+                             48 ;main.c:10: while (1) {
+   0000 0E 00         [ 7]   49 	ld	c,#0x00
+   0002                      50 00102$:
+                             51 ;main.c:11: *mem = j++;
+   0002 41            [ 4]   52 	ld	b,c
+   0003 0C            [ 4]   53 	inc	c
+   0004 21 00 82      [10]   54 	ld	hl,#0x8200
+   0007 70            [ 7]   55 	ld	(hl),b
+   0008 18 F8         [12]   56 	jr	00102$
+                             57 	.area _CODE
+                             58 	.area _INITIALIZER
+                             59 	.area _CABS (ABS)
diff --git a/sw/z80_tests/ram/build/main.rel b/sw/z80_tests/ram/build/main.rel
new file mode 100644
index 0000000..cad7a3c
--- /dev/null
+++ b/sw/z80_tests/ram/build/main.rel
@@ -0,0 +1,23 @@
+XL2
+H 9 areas 2 global symbols
+M main
+O -mz80
+S .__.ABS. Def0000
+A _CODE size A flags 0 addr 0
+S _main Def0000
+A _DATA size 0 flags 0 addr 0
+A _INITIALIZED size 0 flags 0 addr 0
+A _DABS size 0 flags 8 addr 0
+A _HOME size 0 flags 0 addr 0
+A _GSINIT size 0 flags 0 addr 0
+A _GSFINAL size 0 flags 0 addr 0
+A _INITIALIZER size 0 flags 0 addr 0
+A _CABS size 0 flags 8 addr 0
+T 00 00
+R 00 00 00 00
+T 00 00 0E 00
+R 00 00 00 00
+T 02 00
+R 00 00 00 00
+T 02 00 41 0C 21 00 82 70 18 F8
+R 00 00 00 00
diff --git a/sw/z80_tests/ram/build/main.sym b/sw/z80_tests/ram/build/main.sym
new file mode 100644
index 0000000..d81bdc8
--- /dev/null
+++ b/sw/z80_tests/ram/build/main.sym
@@ -0,0 +1,27 @@
+ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 1.
+Hexadecimal [16-Bits]
+
+Symbol Table
+
+    .__.$$$.                                                    =  2710 L
+    .__.ABS.                                                    =  0000 G
+    .__.CPU.                                                    =  0000 L
+    .__.H$L.                                                    =  0000 L
+  0 _main                                                          0000 GR
+
+
+ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 2.
+Hexadecimal [16-Bits]
+
+Area Table
+
+   0 _CODE                                      size    A   flags    0
+   1 _DATA                                      size    0   flags    0
+   2 _INITIALIZED                               size    0   flags    0
+   3 _DABS                                      size    0   flags    8
+   4 _HOME                                      size    0   flags    0
+   5 _GSINIT                                    size    0   flags    0
+   6 _GSFINAL                                   size    0   flags    0
+   7 _INITIALIZER                               size    0   flags    0
+   8 _CABS                                      size    0   flags    8
+
diff --git a/sw/z80_tests/ram/build/test.lk b/sw/z80_tests/ram/build/test.lk
new file mode 100644
index 0000000..03a8db4
--- /dev/null
+++ b/sw/z80_tests/ram/build/test.lk
@@ -0,0 +1,11 @@
+-mjwx
+-i build/test.hex
+-b _CODE = 0x0000
+-b _DATA = 0x2000
+-k /usr/libexec/../share/sdcc/lib/z80
+-k /usr/share/sdcc/lib/z80
+-l z80
+build/crt0.rel
+build/main.rel
+
+-e
diff --git a/sw/z80_tests/ram/build/test.map b/sw/z80_tests/ram/build/test.map
new file mode 100644
index 0000000..07b953f
--- /dev/null
+++ b/sw/z80_tests/ram/build/test.map
@@ -0,0 +1,162 @@
+ASxxxx Linker V03.00 + NoICE + sdld,  page 1.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+.  .ABS.                            00000000    00000000 =           0. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+     00000000  .__.ABS.                           main
+     00000000  l__BSEG                         
+     00000000  l__BSS                          
+     00000000  l__CABS                         
+     00000000  l__DABS                         
+     00000000  l__DATA                         
+     00000000  l__GSFINAL                      
+     00000000  l__GSINIT                       
+     00000000  l__HEADER                       
+     00000000  l__HEAP                         
+     00000000  l__HOME                         
+     00000000  l__INITIALIZED                  
+     00000000  l__INITIALIZER                  
+     00000000  s__CABS                         
+     00000000  s__CODE                         
+     00000000  s__DABS                         
+     00000000  s__HEADER                       
+     00000000  s__HEADER0                      
+     00000000  s__HEADER1                      
+     00000000  s__HEADER2                      
+     00000000  s__HEADER3                      
+     00000000  s__HEADER4                      
+     00000000  s__HEADER5                      
+     00000000  s__HEADER6                      
+     00000000  s__HEADER7                      
+     00000000  s__HEADER8                      
+     00000002  l__HEADER1                      
+     00000002  l__HEADER2                      
+     00000002  l__HEADER3                      
+     00000002  l__HEADER4                      
+     00000002  l__HEADER5                      
+     00000002  l__HEADER6                      
+     00000002  l__HEADER7                      
+     00000003  l__HEADER0                      
+     00000009  l__HEADER8                      
+     0000000D  l__CODE                         
+     0000000D  s__GSFINAL                      
+     0000000D  s__GSINIT                       
+     0000000D  s__HOME                         
+     0000000D  s__INITIALIZER                  
+     00002000  s__BSEG                         
+     00002000  s__BSS                          
+     00002000  s__DATA                         
+     00002000  s__HEAP                         
+     00002000  s__INITIALIZED                  
+ASxxxx Linker V03.00 + NoICE + sdld,  page 2.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_CODE                               00000000    0000000D =          13. bytes (REL,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+     00000000  _exit                              crt0
+     00000003  _main                              main
+
+ASxxxx Linker V03.00 + NoICE + sdld,  page 3.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER0                            00000000    00000003 =           3. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 4.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER1                            00000000    00000002 =           2. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 5.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER2                            00000000    00000002 =           2. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 6.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER3                            00000000    00000002 =           2. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 7.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER4                            00000000    00000002 =           2. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 8.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER5                            00000000    00000002 =           2. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 9.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER6                            00000000    00000002 =           2. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 10.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER7                            00000000    00000002 =           2. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 11.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER8                            00000000    00000009 =           9. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 12.
+
+Files Linked                              [ module(s) ]
+
+build/crt0.rel                            [ crt0 ]
+build/main.rel                            [ main ]
+
+ASxxxx Linker V03.00 + NoICE + sdld,  page 13.
+
+User Base Address Definitions
+
+_CODE = 0x0000
+_DATA = 0x2000
+
+
\ No newline at end of file
diff --git a/sw/z80_tests/ram/build/test.noi b/sw/z80_tests/ram/build/test.noi
new file mode 100644
index 0000000..403beda
--- /dev/null
+++ b/sw/z80_tests/ram/build/test.noi
@@ -0,0 +1,48 @@
+DEF .__.ABS. 0x0
+DEF l__BSEG 0x0
+DEF l__BSS 0x0
+DEF l__CABS 0x0
+DEF l__DABS 0x0
+DEF l__DATA 0x0
+DEF l__GSFINAL 0x0
+DEF l__GSINIT 0x0
+DEF l__HEADER 0x0
+DEF l__HEAP 0x0
+DEF l__HOME 0x0
+DEF l__INITIALIZED 0x0
+DEF l__INITIALIZER 0x0
+DEF s__CABS 0x0
+DEF s__CODE 0x0
+DEF s__DABS 0x0
+DEF s__HEADER 0x0
+DEF s__HEADER0 0x0
+DEF s__HEADER1 0x0
+DEF s__HEADER2 0x0
+DEF s__HEADER3 0x0
+DEF s__HEADER4 0x0
+DEF s__HEADER5 0x0
+DEF s__HEADER6 0x0
+DEF s__HEADER7 0x0
+DEF s__HEADER8 0x0
+DEF l__HEADER1 0x2
+DEF l__HEADER2 0x2
+DEF l__HEADER3 0x2
+DEF l__HEADER4 0x2
+DEF l__HEADER5 0x2
+DEF l__HEADER6 0x2
+DEF l__HEADER7 0x2
+DEF l__HEADER0 0x3
+DEF l__HEADER8 0x9
+DEF l__CODE 0xD
+DEF s__GSFINAL 0xD
+DEF s__GSINIT 0xD
+DEF s__HOME 0xD
+DEF s__INITIALIZER 0xD
+DEF s__BSEG 0x2000
+DEF s__BSS 0x2000
+DEF s__DATA 0x2000
+DEF s__HEAP 0x2000
+DEF s__INITIALIZED 0x2000
+DEF _exit 0x0
+DEF _main 0x3
+LOAD build/test.ihx
diff --git a/sw/z80_tests/ram/build/test.z80 b/sw/z80_tests/ram/build/test.z80
new file mode 100644
index 0000000..25a162a
--- /dev/null
+++ b/sw/z80_tests/ram/build/test.z80
@@ -0,0 +1,73 @@
+;
+;  DZ80 V3.4.1 Z80 Disassembly of build/test.bin
+;  2017/09/26 09:42
+;
+	org	0x0
+;
+X0000:	halt
+;
+	jr	X0000
+;
+X0003:	ld	c,0x0
+X0005:	ld	b,c
+	inc	c
+	ld	hl,X8200
+	ld	(hl),b
+	jr	X0005
+;
+	rst	0x38
+;
+	org	0x10
+;
+	reti
+;
+	rst	0x38
+;
+	org	0x18
+;
+	reti
+;
+	rst	0x38
+;
+	org	0x20
+;
+	reti
+;
+	rst	0x38
+;
+	org	0x28
+;
+	reti
+;
+	rst	0x38
+;
+	org	0x30
+;
+	reti
+;
+	rst	0x38
+;
+	org	0x38
+;
+	reti
+;
+	rst	0x38
+;
+	org	0x100
+;
+	ld	sp,Xffff
+	call	X0003
+	jp	X0000
+;
+;	Miscellaneous equates
+;
+;  These are addresses referenced in the code but
+;  which are in the middle of a multibyte instruction
+;  or are addresses outside the initialized space
+;
+X8200	equ	0x8200
+Xffff	equ	0xffff
+;
+	end
+;
+
diff --git a/sw/z80_tests/ram/crt0.s b/sw/z80_tests/ram/crt0.s
new file mode 100644
index 0000000..ac0698f
--- /dev/null
+++ b/sw/z80_tests/ram/crt0.s
@@ -0,0 +1,54 @@
+	.module crt0
+	.globl	_main
+
+	.area	_HEADER (ABS)
+	;; Reset vector
+	.org 	0
+	jp	init
+
+	.org	0x08
+	reti
+	.org	0x10
+	reti
+	.org	0x18
+	reti
+	.org	0x20
+	reti
+	.org	0x28
+	reti
+	.org	0x30
+	reti
+	.org	0x38
+	reti
+    .org    0x66
+    ld hl,#BEEF
+    reti
+
+	.org	0x100
+init:
+	;; Set stack pointer directly above top of memory.
+	ld	sp,#0xFFFF
+
+	;; Start of the program
+	call	_main
+	jp	    _exit
+
+	;; Ordering of segments for the linker.
+	.area	_HOME
+	.area	_CODE
+	.area	_INITIALIZER
+	.area   _GSINIT
+	.area   _GSFINAL
+
+	.area	_DATA
+	.area	_INITIALIZED
+	.area	_BSEG
+	.area   _BSS
+	.area   _HEAP
+
+	.area   _CODE
+
+_exit::
+1$:
+	halt
+	jr	1$
diff --git a/sw/z80_tests/ram/main.c b/sw/z80_tests/ram/main.c
new file mode 100644
index 0000000..581072b
--- /dev/null
+++ b/sw/z80_tests/ram/main.c
@@ -0,0 +1,13 @@
+
+void main(void)
+{
+    unsigned char j;
+    unsigned char *mem;
+    
+    j = 0;
+    mem = (unsigned char *) 0x8200; // somwhere in ram
+
+    while (1) {
+        *mem = j++;
+    }
+}
diff --git a/sw/z80_tests/ram/makefile b/sw/z80_tests/ram/makefile
new file mode 100644
index 0000000..35d7419
--- /dev/null
+++ b/sw/z80_tests/ram/makefile
@@ -0,0 +1,52 @@
+####
+# source code settings
+#
+OSNAME := test
+ 
+CSOURCES 	:=  $(wildcard *.c)
+
+OBJECTS 	:= $(patsubst %.c,build/%.rel,$(CSOURCES))
+HEXFILE		:= build/$(OSNAME).hex
+BINARY  	:= build/$(OSNAME).bin
+
+### 
+# compiler settings
+#
+CC 		:= sdcc
+
+CFLAGS	:= -mz80 \
+			-I . \
+			-DDEBUG
+
+LDFLAGS := -mz80 --no-std-crt0 build/crt0.rel \
+			--std-c89 -pedantic \
+			--code-loc 0x0000 --data-loc 0x2000
+
+.PHONY: dirs dis clean
+all: $(BINARY)
+
+# build binary
+$(BINARY): $(OBJECTS) dirs
+	$(CC) $(LDFLAGS) $(OBJECTS) -o $(HEXFILE)
+	@# xxd -r -p $(HEXFILE) $(BINARY)
+	@# makebin -s 16384 $(HEXFILE) $(BINARY)
+	makebin -s 8192 $(HEXFILE) $(BINARY)
+
+$(OBJECTS): build/%.rel : %.c $(CSOURCES) dirs build/crt0.rel
+	@printf "\n"
+	$(CC) $(CFLAGS) -c $< -o $@
+
+build/crt0.rel: crt0.s
+	sdasz80 -o $<
+	@mv crt0.rel build/
+
+dirs:
+	mkdir -p build
+
+dis: $(BINARY)
+	@# z80dasm -a -l -g 0h $< -o build/$(OSNAME).s
+	dz80 -b -n $<
+
+clean:
+	- rm -rd build/*
+	- rm crt0.rel
diff --git a/sw/z80_tests/usart/build/crt0.rel b/sw/z80_tests/usart/build/crt0.rel
new file mode 100644
index 0000000..809c0e6
--- /dev/null
+++ b/sw/z80_tests/usart/build/crt0.rel
@@ -0,0 +1,86 @@
+XL2
+H 14 areas 5 global symbols
+M crt0
+S _main Ref0000
+S .__.ABS. Def0000
+A _CODE size A flags 0 addr 0
+S __clock Def0000
+S _exit Def0004
+A _HEADER size 0 flags 8 addr 0
+A _HEADER0 size 3 flags 8 addr 0
+A _HEADER1 size 2 flags 8 addr 8
+A _HEADER2 size 2 flags 8 addr 10
+A _HEADER3 size 2 flags 8 addr 18
+A _HEADER4 size 2 flags 8 addr 20
+A _HEADER5 size 2 flags 8 addr 28
+A _HEADER6 size 2 flags 8 addr 30
+A _HEADER7 size 2 flags 8 addr 38
+A _HEADER8 size C flags 8 addr 100
+A _HOME size 0 flags 0 addr 0
+A _INITIALIZER size 0 flags 0 addr 0
+A _GSINIT size 6 flags 0 addr 0
+S gsinit Def0000
+A _GSFINAL size 1 flags 0 addr 0
+A _DATA size 0 flags 0 addr 0
+A _INITIALIZED size 0 flags 0 addr 0
+A _BSEG size 0 flags 0 addr 0
+A _BSS size 0 flags 0 addr 0
+A _HEAP size 0 flags 0 addr 0
+T 00 00
+R 00 00 02 00
+T 00 00 C3 00 01
+R 00 00 02 00 00 03 0A 00
+T 08 00
+R 00 00 03 00
+T 08 00 ED 4D
+R 00 00 03 00
+T 10 00
+R 00 00 04 00
+T 10 00 ED 4D
+R 00 00 04 00
+T 18 00
+R 00 00 05 00
+T 18 00 ED 4D
+R 00 00 05 00
+T 20 00
+R 00 00 06 00
+T 20 00 ED 4D
+R 00 00 06 00
+T 28 00
+R 00 00 07 00
+T 28 00 ED 4D
+R 00 00 07 00
+T 30 00
+R 00 00 08 00
+T 30 00 ED 4D
+R 00 00 08 00
+T 38 00
+R 00 00 09 00
+T 38 00 ED 4D
+R 00 00 09 00
+T 00 01
+R 00 00 0A 00
+T 00 01
+R 00 00 0A 00
+T 00 01 31 FF FF CD 00 00 CD 00 00 C3 04 00
+R 00 00 0A 00 00 06 0D 00 02 09 00 00 00 0C 00 00
+T 00 00
+R 00 00 00 00
+T 00 00 3E 02 CF C9
+R 00 00 00 00
+T 04 00
+R 00 00 00 00
+T 04 00 3E 00 CF
+R 00 00 00 00
+T 07 00
+R 00 00 00 00
+T 07 00 76 18 FD
+R 00 00 00 00
+T 00 00
+R 00 00 0D 00
+T 00 00 78 B1 28 02 ED B0
+R 00 00 0D 00
+T 06 00
+R 00 00 0D 00
+T 00 00 C9
+R 00 00 0E 00
diff --git a/sw/z80_tests/usart/build/ctc.asm b/sw/z80_tests/usart/build/ctc.asm
new file mode 100644
index 0000000..838756a
--- /dev/null
+++ b/sw/z80_tests/usart/build/ctc.asm
@@ -0,0 +1,52 @@
+;--------------------------------------------------------
+; File Created by SDCC : free open source ANSI-C Compiler
+; Version 3.6.0 #9615 (Linux)
+;--------------------------------------------------------
+	.module ctc
+	.optsdcc -mz80
+	
+;--------------------------------------------------------
+; Public variables in this module
+;--------------------------------------------------------
+	.globl _ctc_control
+;--------------------------------------------------------
+; special function registers
+;--------------------------------------------------------
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+	.area _DATA
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+	.area _INITIALIZED
+;--------------------------------------------------------
+; absolute external ram data
+;--------------------------------------------------------
+	.area _DABS (ABS)
+;--------------------------------------------------------
+; global & static initialisations
+;--------------------------------------------------------
+	.area _HOME
+	.area _GSINIT
+	.area _GSFINAL
+	.area _GSINIT
+;--------------------------------------------------------
+; Home
+;--------------------------------------------------------
+	.area _HOME
+	.area _HOME
+;--------------------------------------------------------
+; code
+;--------------------------------------------------------
+	.area _CODE
+;ctc.c:3: void ctc_control()
+;	---------------------------------
+; Function ctc_control
+; ---------------------------------
+_ctc_control::
+;ctc.c:6: }
+	ret
+	.area _CODE
+	.area _INITIALIZER
+	.area _CABS (ABS)
diff --git a/sw/z80_tests/usart/build/ctc.lst b/sw/z80_tests/usart/build/ctc.lst
new file mode 100644
index 0000000..e758d8a
--- /dev/null
+++ b/sw/z80_tests/usart/build/ctc.lst
@@ -0,0 +1,52 @@
+                              1 ;--------------------------------------------------------
+                              2 ; File Created by SDCC : free open source ANSI-C Compiler
+                              3 ; Version 3.6.0 #9615 (Linux)
+                              4 ;--------------------------------------------------------
+                              5 	.module ctc
+                              6 	.optsdcc -mz80
+                              7 	
+                              8 ;--------------------------------------------------------
+                              9 ; Public variables in this module
+                             10 ;--------------------------------------------------------
+                             11 	.globl _ctc_control
+                             12 ;--------------------------------------------------------
+                             13 ; special function registers
+                             14 ;--------------------------------------------------------
+                             15 ;--------------------------------------------------------
+                             16 ; ram data
+                             17 ;--------------------------------------------------------
+                             18 	.area _DATA
+                             19 ;--------------------------------------------------------
+                             20 ; ram data
+                             21 ;--------------------------------------------------------
+                             22 	.area _INITIALIZED
+                             23 ;--------------------------------------------------------
+                             24 ; absolute external ram data
+                             25 ;--------------------------------------------------------
+                             26 	.area _DABS (ABS)
+                             27 ;--------------------------------------------------------
+                             28 ; global & static initialisations
+                             29 ;--------------------------------------------------------
+                             30 	.area _HOME
+                             31 	.area _GSINIT
+                             32 	.area _GSFINAL
+                             33 	.area _GSINIT
+                             34 ;--------------------------------------------------------
+                             35 ; Home
+                             36 ;--------------------------------------------------------
+                             37 	.area _HOME
+                             38 	.area _HOME
+                             39 ;--------------------------------------------------------
+                             40 ; code
+                             41 ;--------------------------------------------------------
+                             42 	.area _CODE
+                             43 ;ctc.c:3: void ctc_control()
+                             44 ;	---------------------------------
+                             45 ; Function ctc_control
+                             46 ; ---------------------------------
+   0000                      47 _ctc_control::
+                             48 ;ctc.c:6: }
+   0000 C9            [10]   49 	ret
+                             50 	.area _CODE
+                             51 	.area _INITIALIZER
+                             52 	.area _CABS (ABS)
diff --git a/sw/z80_tests/usart/build/ctc.rel b/sw/z80_tests/usart/build/ctc.rel
new file mode 100644
index 0000000..50a8b42
--- /dev/null
+++ b/sw/z80_tests/usart/build/ctc.rel
@@ -0,0 +1,19 @@
+XL2
+H 9 areas 2 global symbols
+M ctc
+O -mz80
+S .__.ABS. Def0000
+A _CODE size 1 flags 0 addr 0
+S _ctc_control Def0000
+A _DATA size 0 flags 0 addr 0
+A _INITIALIZED size 0 flags 0 addr 0
+A _DABS size 0 flags 8 addr 0
+A _HOME size 0 flags 0 addr 0
+A _GSINIT size 0 flags 0 addr 0
+A _GSFINAL size 0 flags 0 addr 0
+A _INITIALIZER size 0 flags 0 addr 0
+A _CABS size 0 flags 8 addr 0
+T 00 00
+R 00 00 00 00
+T 00 00 C9
+R 00 00 00 00
diff --git a/sw/z80_tests/usart/build/ctc.sym b/sw/z80_tests/usart/build/ctc.sym
new file mode 100644
index 0000000..82ca00e
--- /dev/null
+++ b/sw/z80_tests/usart/build/ctc.sym
@@ -0,0 +1,27 @@
+ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 1.
+Hexadecimal [16-Bits]
+
+Symbol Table
+
+    .__.$$$.                                                    =  2710 L
+    .__.ABS.                                                    =  0000 G
+    .__.CPU.                                                    =  0000 L
+    .__.H$L.                                                    =  0000 L
+  0 _ctc_control                                                   0000 GR
+
+
+ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 2.
+Hexadecimal [16-Bits]
+
+Area Table
+
+   0 _CODE                                      size    1   flags    0
+   1 _DATA                                      size    0   flags    0
+   2 _INITIALIZED                               size    0   flags    0
+   3 _DABS                                      size    0   flags    8
+   4 _HOME                                      size    0   flags    0
+   5 _GSINIT                                    size    0   flags    0
+   6 _GSFINAL                                   size    0   flags    0
+   7 _INITIALIZER                               size    0   flags    0
+   8 _CABS                                      size    0   flags    8
+
diff --git a/sw/z80_tests/usart/build/main.asm b/sw/z80_tests/usart/build/main.asm
new file mode 100644
index 0000000..44f199a
--- /dev/null
+++ b/sw/z80_tests/usart/build/main.asm
@@ -0,0 +1,90 @@
+;--------------------------------------------------------
+; File Created by SDCC : free open source ANSI-C Compiler
+; Version 3.6.0 #9615 (Linux)
+;--------------------------------------------------------
+	.module main
+	.optsdcc -mz80
+	
+;--------------------------------------------------------
+; Public variables in this module
+;--------------------------------------------------------
+	.globl _main
+	.globl _usart_write
+	.globl _usart_init
+;--------------------------------------------------------
+; special function registers
+;--------------------------------------------------------
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+	.area _DATA
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+	.area _INITIALIZED
+;--------------------------------------------------------
+; absolute external ram data
+;--------------------------------------------------------
+	.area _DABS (ABS)
+;--------------------------------------------------------
+; global & static initialisations
+;--------------------------------------------------------
+	.area _HOME
+	.area _GSINIT
+	.area _GSFINAL
+	.area _GSINIT
+;--------------------------------------------------------
+; Home
+;--------------------------------------------------------
+	.area _HOME
+	.area _HOME
+;--------------------------------------------------------
+; code
+;--------------------------------------------------------
+	.area _CODE
+;main.c:3: void main(void)
+;	---------------------------------
+; Function main
+; ---------------------------------
+_main::
+;main.c:5: usart_init(USART_BAUDRATE_1200, USART_PARITY_EVEN, USART_STOP_BITS_1);
+	ld	hl,#0x000a
+	push	hl
+	ld	l, #0x01
+	push	hl
+	ld	l, #0x60
+	push	hl
+	call	_usart_init
+	ld	hl,#6
+	add	hl,sp
+	ld	sp,hl
+;main.c:6: usart_write("Hello, World!\n", 13);
+	ld	hl,#0x000d
+	push	hl
+	ld	hl,#___str_0
+	push	hl
+	call	_usart_write
+	pop	af
+	pop	af
+;main.c:8: while(1) {
+00102$:
+;main.c:9: usart_write("done\n", 5);
+	ld	hl,#0x0005
+	push	hl
+	ld	hl,#___str_1
+	push	hl
+	call	_usart_write
+	pop	af
+	pop	af
+	jr	00102$
+___str_0:
+	.ascii "Hello, World!"
+	.db 0x0a
+	.db 0x00
+___str_1:
+	.ascii "done"
+	.db 0x0a
+	.db 0x00
+	.area _CODE
+	.area _INITIALIZER
+	.area _CABS (ABS)
diff --git a/sw/z80_tests/usart/build/main.lst b/sw/z80_tests/usart/build/main.lst
new file mode 100644
index 0000000..c7b4201
--- /dev/null
+++ b/sw/z80_tests/usart/build/main.lst
@@ -0,0 +1,92 @@
+                              1 ;--------------------------------------------------------
+                              2 ; File Created by SDCC : free open source ANSI-C Compiler
+                              3 ; Version 3.6.0 #9615 (Linux)
+                              4 ;--------------------------------------------------------
+                              5 	.module main
+                              6 	.optsdcc -mz80
+                              7 	
+                              8 ;--------------------------------------------------------
+                              9 ; Public variables in this module
+                             10 ;--------------------------------------------------------
+                             11 	.globl _main
+                             12 	.globl _usart_write
+                             13 	.globl _usart_init
+                             14 ;--------------------------------------------------------
+                             15 ; special function registers
+                             16 ;--------------------------------------------------------
+                             17 ;--------------------------------------------------------
+                             18 ; ram data
+                             19 ;--------------------------------------------------------
+                             20 	.area _DATA
+                             21 ;--------------------------------------------------------
+                             22 ; ram data
+                             23 ;--------------------------------------------------------
+                             24 	.area _INITIALIZED
+                             25 ;--------------------------------------------------------
+                             26 ; absolute external ram data
+                             27 ;--------------------------------------------------------
+                             28 	.area _DABS (ABS)
+                             29 ;--------------------------------------------------------
+                             30 ; global & static initialisations
+                             31 ;--------------------------------------------------------
+                             32 	.area _HOME
+                             33 	.area _GSINIT
+                             34 	.area _GSFINAL
+                             35 	.area _GSINIT
+                             36 ;--------------------------------------------------------
+                             37 ; Home
+                             38 ;--------------------------------------------------------
+                             39 	.area _HOME
+                             40 	.area _HOME
+                             41 ;--------------------------------------------------------
+                             42 ; code
+                             43 ;--------------------------------------------------------
+                             44 	.area _CODE
+                             45 ;main.c:3: void main(void)
+                             46 ;	---------------------------------
+                             47 ; Function main
+                             48 ; ---------------------------------
+   0000                      49 _main::
+                             50 ;main.c:5: usart_init(USART_BAUDRATE_1200, USART_PARITY_EVEN, USART_STOP_BITS_1);
+   0000 21 0A 00      [10]   51 	ld	hl,#0x000a
+   0003 E5            [11]   52 	push	hl
+   0004 2E 01         [ 7]   53 	ld	l, #0x01
+   0006 E5            [11]   54 	push	hl
+   0007 2E 60         [ 7]   55 	ld	l, #0x60
+   0009 E5            [11]   56 	push	hl
+   000A CDr00r00      [17]   57 	call	_usart_init
+   000D 21 06 00      [10]   58 	ld	hl,#6
+   0010 39            [11]   59 	add	hl,sp
+   0011 F9            [ 6]   60 	ld	sp,hl
+                             61 ;main.c:6: usart_write("Hello, World!\n", 13);
+   0012 21 0D 00      [10]   62 	ld	hl,#0x000d
+   0015 E5            [11]   63 	push	hl
+   0016 21r2Er00      [10]   64 	ld	hl,#___str_0
+   0019 E5            [11]   65 	push	hl
+   001A CDr00r00      [17]   66 	call	_usart_write
+   001D F1            [10]   67 	pop	af
+   001E F1            [10]   68 	pop	af
+                             69 ;main.c:8: while(1) {
+   001F                      70 00102$:
+                             71 ;main.c:9: usart_write("done\n", 5);
+   001F 21 05 00      [10]   72 	ld	hl,#0x0005
+   0022 E5            [11]   73 	push	hl
+   0023 21r3Dr00      [10]   74 	ld	hl,#___str_1
+   0026 E5            [11]   75 	push	hl
+   0027 CDr00r00      [17]   76 	call	_usart_write
+   002A F1            [10]   77 	pop	af
+   002B F1            [10]   78 	pop	af
+   002C 18 F1         [12]   79 	jr	00102$
+   002E                      80 ___str_0:
+   002E 48 65 6C 6C 6F 2C    81 	.ascii "Hello, World!"
+        20 57 6F 72 6C 64
+        21
+   003B 0A                   82 	.db 0x0a
+   003C 00                   83 	.db 0x00
+   003D                      84 ___str_1:
+   003D 64 6F 6E 65          85 	.ascii "done"
+   0041 0A                   86 	.db 0x0a
+   0042 00                   87 	.db 0x00
+                             88 	.area _CODE
+                             89 	.area _INITIALIZER
+                             90 	.area _CABS (ABS)
diff --git a/sw/z80_tests/usart/build/main.rel b/sw/z80_tests/usart/build/main.rel
new file mode 100644
index 0000000..2557016
--- /dev/null
+++ b/sw/z80_tests/usart/build/main.rel
@@ -0,0 +1,41 @@
+XL2
+H 9 areas 4 global symbols
+M main
+O -mz80
+S _usart_write Ref0000
+S .__.ABS. Def0000
+S _usart_init Ref0000
+A _CODE size 43 flags 0 addr 0
+S _main Def0000
+A _DATA size 0 flags 0 addr 0
+A _INITIALIZED size 0 flags 0 addr 0
+A _DABS size 0 flags 8 addr 0
+A _HOME size 0 flags 0 addr 0
+A _GSINIT size 0 flags 0 addr 0
+A _GSFINAL size 0 flags 0 addr 0
+A _INITIALIZER size 0 flags 0 addr 0
+A _CABS size 0 flags 8 addr 0
+T 00 00
+R 00 00 00 00
+T 00 00 21 0A 00 E5 2E 01 E5 2E 60 E5 CD 00 00 21
+R 00 00 00 00 02 0D 02 00
+T 0E 00 06 00 39 F9 21 0D 00 E5 21 2E 00 E5 CD
+R 00 00 00 00 00 0B 00 00
+T 1B 00 00 00 F1 F1
+R 00 00 00 00 02 02 00 00
+T 1F 00
+R 00 00 00 00
+T 1F 00 21 05 00 E5 21 3D 00 E5 CD 00 00 F1 F1 18
+R 00 00 00 00 00 07 00 00 02 0B 00 00
+T 2D 00 F1
+R 00 00 00 00
+T 2E 00
+R 00 00 00 00
+T 2E 00 48 65 6C 6C 6F 2C 20 57 6F 72 6C 64 21 0A
+R 00 00 00 00
+T 3C 00 00
+R 00 00 00 00
+T 3D 00
+R 00 00 00 00
+T 3D 00 64 6F 6E 65 0A 00
+R 00 00 00 00
diff --git a/sw/z80_tests/usart/build/main.sym b/sw/z80_tests/usart/build/main.sym
new file mode 100644
index 0000000..df02e0d
--- /dev/null
+++ b/sw/z80_tests/usart/build/main.sym
@@ -0,0 +1,30 @@
+ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 1.
+Hexadecimal [16-Bits]
+
+Symbol Table
+
+    .__.$$$.                                                    =  2710 L
+    .__.ABS.                                                    =  0000 G
+    .__.CPU.                                                    =  0000 L
+    .__.H$L.                                                    =  0000 L
+  0 ___str_0                                                       002E R
+  0 ___str_1                                                       003D R
+  0 _main                                                          0000 GR
+    _usart_init                                                    **** GX
+    _usart_write                                                   **** GX
+
+ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 2.
+Hexadecimal [16-Bits]
+
+Area Table
+
+   0 _CODE                                      size   43   flags    0
+   1 _DATA                                      size    0   flags    0
+   2 _INITIALIZED                               size    0   flags    0
+   3 _DABS                                      size    0   flags    8
+   4 _HOME                                      size    0   flags    0
+   5 _GSINIT                                    size    0   flags    0
+   6 _GSFINAL                                   size    0   flags    0
+   7 _INITIALIZER                               size    0   flags    0
+   8 _CABS                                      size    0   flags    8
+
diff --git a/sw/z80_tests/usart/build/pio.asm b/sw/z80_tests/usart/build/pio.asm
new file mode 100644
index 0000000..ee1fcc6
--- /dev/null
+++ b/sw/z80_tests/usart/build/pio.asm
@@ -0,0 +1,194 @@
+;--------------------------------------------------------
+; File Created by SDCC : free open source ANSI-C Compiler
+; Version 3.6.0 #9615 (Linux)
+;--------------------------------------------------------
+	.module pio
+	.optsdcc -mz80
+	
+;--------------------------------------------------------
+; Public variables in this module
+;--------------------------------------------------------
+	.globl __pio_data
+	.globl __pio_control
+	.globl _pio_set_mode
+	.globl _pio_set_interrupts
+	.globl _pio_set_interrupts_mask
+;--------------------------------------------------------
+; special function registers
+;--------------------------------------------------------
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+	.area _DATA
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+	.area _INITIALIZED
+_pio_port:
+	.ds 2
+_pio_ctrl:
+	.ds 2
+;--------------------------------------------------------
+; absolute external ram data
+;--------------------------------------------------------
+	.area _DABS (ABS)
+;--------------------------------------------------------
+; global & static initialisations
+;--------------------------------------------------------
+	.area _HOME
+	.area _GSINIT
+	.area _GSFINAL
+	.area _GSINIT
+;--------------------------------------------------------
+; Home
+;--------------------------------------------------------
+	.area _HOME
+	.area _HOME
+;--------------------------------------------------------
+; code
+;--------------------------------------------------------
+	.area _CODE
+;pio.c:6: inline void _pio_data(int port, uint8_t data)
+;	---------------------------------
+; Function _pio_data
+; ---------------------------------
+__pio_data::
+;pio.c:8: *(pio_port + port) = data;
+	ld	hl,#2
+	add	hl,sp
+	ld	iy,#_pio_port
+	ld	a,0 (iy)
+	add	a, (hl)
+	ld	c,a
+	ld	a,1 (iy)
+	inc	hl
+	adc	a, (hl)
+	ld	b,a
+	ld	hl, #4+0
+	add	hl, sp
+	ld	a, (hl)
+	ld	(bc),a
+	ret
+;pio.c:11: inline void _pio_control(int port, uint8_t cmd)
+;	---------------------------------
+; Function _pio_control
+; ---------------------------------
+__pio_control::
+;pio.c:13: *(pio_ctrl + port) = cmd;
+	ld	hl,#2
+	add	hl,sp
+	ld	iy,#_pio_ctrl
+	ld	a,0 (iy)
+	add	a, (hl)
+	ld	c,a
+	ld	a,1 (iy)
+	inc	hl
+	adc	a, (hl)
+	ld	b,a
+	ld	hl, #4+0
+	add	hl, sp
+	ld	a, (hl)
+	ld	(bc),a
+	ret
+;pio.c:16: void pio_set_mode(int port, int mode, uint8_t io)
+;	---------------------------------
+; Function pio_set_mode
+; ---------------------------------
+_pio_set_mode::
+;pio.c:19: _pio_control(port, ((mode << 6) | 0x0F));
+	ld	hl, #4+0
+	add	hl, sp
+	ld	a, (hl)
+	rrca
+	rrca
+	and	a,#0xc0
+	or	a, #0x0f
+	ld	c,a
+	pop	de
+	pop	hl
+	push	hl
+	push	de
+;pio.c:13: *(pio_ctrl + port) = cmd;
+	ld	iy,(_pio_ctrl)
+	ld	e, l
+	ld	d, h
+	add	iy, de
+	ld	0 (iy), c
+;pio.c:23: if (mode == PIO_MODE_BIT_IO) {
+	ld	iy,#4
+	add	iy,sp
+	ld	a,0 (iy)
+	sub	a, #0x03
+	ret	NZ
+	ld	a,1 (iy)
+	or	a, a
+	ret	NZ
+;pio.c:24: _pio_control(port, io);
+	ld	iy,#6
+	add	iy,sp
+	ld	c,0 (iy)
+;pio.c:13: *(pio_ctrl + port) = cmd;
+	ld	de,(_pio_ctrl)
+	add	hl,de
+	ld	(hl),c
+;pio.c:24: _pio_control(port, io);
+	ret
+;pio.c:28: void pio_set_interrupts(int port, int control)
+;	---------------------------------
+; Function pio_set_interrupts
+; ---------------------------------
+_pio_set_interrupts::
+;pio.c:31: _pio_control(port, (control | 0x07));
+	ld	hl, #4+0
+	add	hl, sp
+	ld	a, (hl)
+	or	a, #0x07
+	ld	c,a
+	pop	de
+	pop	hl
+	push	hl
+	push	de
+;pio.c:13: *(pio_ctrl + port) = cmd;
+	ld	de,(_pio_ctrl)
+	add	hl,de
+	ld	(hl),c
+;pio.c:31: _pio_control(port, (control | 0x07));
+	ret
+;pio.c:34: void pio_set_interrupts_mask(int port, int control, uint8_t mask)
+;	---------------------------------
+; Function pio_set_interrupts_mask
+; ---------------------------------
+_pio_set_interrupts_mask::
+;pio.c:38: _pio_control(port, (control | 0x17));
+	ld	hl, #4+0
+	add	hl, sp
+	ld	a, (hl)
+	or	a, #0x17
+	ld	c,a
+	pop	de
+	pop	hl
+	push	hl
+	push	de
+;pio.c:13: *(pio_ctrl + port) = cmd;
+	ld	iy,(_pio_ctrl)
+	ld	e, l
+	ld	d, h
+	add	iy, de
+	ld	0 (iy), c
+;pio.c:39: _pio_control(port, mask);
+	ld	iy,#6
+	add	iy,sp
+	ld	c,0 (iy)
+;pio.c:13: *(pio_ctrl + port) = cmd;
+	ld	de,(_pio_ctrl)
+	add	hl,de
+	ld	(hl),c
+;pio.c:39: _pio_control(port, mask);
+	ret
+	.area _CODE
+	.area _INITIALIZER
+__xinit__pio_port:
+	.dw #0x4200
+__xinit__pio_ctrl:
+	.dw #0x4202
+	.area _CABS (ABS)
diff --git a/sw/z80_tests/usart/build/pio.lst b/sw/z80_tests/usart/build/pio.lst
new file mode 100644
index 0000000..fcafc2a
--- /dev/null
+++ b/sw/z80_tests/usart/build/pio.lst
@@ -0,0 +1,194 @@
+                              1 ;--------------------------------------------------------
+                              2 ; File Created by SDCC : free open source ANSI-C Compiler
+                              3 ; Version 3.6.0 #9615 (Linux)
+                              4 ;--------------------------------------------------------
+                              5 	.module pio
+                              6 	.optsdcc -mz80
+                              7 	
+                              8 ;--------------------------------------------------------
+                              9 ; Public variables in this module
+                             10 ;--------------------------------------------------------
+                             11 	.globl __pio_data
+                             12 	.globl __pio_control
+                             13 	.globl _pio_set_mode
+                             14 	.globl _pio_set_interrupts
+                             15 	.globl _pio_set_interrupts_mask
+                             16 ;--------------------------------------------------------
+                             17 ; special function registers
+                             18 ;--------------------------------------------------------
+                             19 ;--------------------------------------------------------
+                             20 ; ram data
+                             21 ;--------------------------------------------------------
+                             22 	.area _DATA
+                             23 ;--------------------------------------------------------
+                             24 ; ram data
+                             25 ;--------------------------------------------------------
+                             26 	.area _INITIALIZED
+   0000                      27 _pio_port:
+   0000                      28 	.ds 2
+   0002                      29 _pio_ctrl:
+   0002                      30 	.ds 2
+                             31 ;--------------------------------------------------------
+                             32 ; absolute external ram data
+                             33 ;--------------------------------------------------------
+                             34 	.area _DABS (ABS)
+                             35 ;--------------------------------------------------------
+                             36 ; global & static initialisations
+                             37 ;--------------------------------------------------------
+                             38 	.area _HOME
+                             39 	.area _GSINIT
+                             40 	.area _GSFINAL
+                             41 	.area _GSINIT
+                             42 ;--------------------------------------------------------
+                             43 ; Home
+                             44 ;--------------------------------------------------------
+                             45 	.area _HOME
+                             46 	.area _HOME
+                             47 ;--------------------------------------------------------
+                             48 ; code
+                             49 ;--------------------------------------------------------
+                             50 	.area _CODE
+                             51 ;pio.c:6: inline void _pio_data(int port, uint8_t data)
+                             52 ;	---------------------------------
+                             53 ; Function _pio_data
+                             54 ; ---------------------------------
+   0000                      55 __pio_data::
+                             56 ;pio.c:8: *(pio_port + port) = data;
+   0000 21 02 00      [10]   57 	ld	hl,#2
+   0003 39            [11]   58 	add	hl,sp
+   0004 FD 21r00r00   [14]   59 	ld	iy,#_pio_port
+   0008 FD 7E 00      [19]   60 	ld	a,0 (iy)
+   000B 86            [ 7]   61 	add	a, (hl)
+   000C 4F            [ 4]   62 	ld	c,a
+   000D FD 7E 01      [19]   63 	ld	a,1 (iy)
+   0010 23            [ 6]   64 	inc	hl
+   0011 8E            [ 7]   65 	adc	a, (hl)
+   0012 47            [ 4]   66 	ld	b,a
+   0013 21 04 00      [10]   67 	ld	hl, #4+0
+   0016 39            [11]   68 	add	hl, sp
+   0017 7E            [ 7]   69 	ld	a, (hl)
+   0018 02            [ 7]   70 	ld	(bc),a
+   0019 C9            [10]   71 	ret
+                             72 ;pio.c:11: inline void _pio_control(int port, uint8_t cmd)
+                             73 ;	---------------------------------
+                             74 ; Function _pio_control
+                             75 ; ---------------------------------
+   001A                      76 __pio_control::
+                             77 ;pio.c:13: *(pio_ctrl + port) = cmd;
+   001A 21 02 00      [10]   78 	ld	hl,#2
+   001D 39            [11]   79 	add	hl,sp
+   001E FD 21r02r00   [14]   80 	ld	iy,#_pio_ctrl
+   0022 FD 7E 00      [19]   81 	ld	a,0 (iy)
+   0025 86            [ 7]   82 	add	a, (hl)
+   0026 4F            [ 4]   83 	ld	c,a
+   0027 FD 7E 01      [19]   84 	ld	a,1 (iy)
+   002A 23            [ 6]   85 	inc	hl
+   002B 8E            [ 7]   86 	adc	a, (hl)
+   002C 47            [ 4]   87 	ld	b,a
+   002D 21 04 00      [10]   88 	ld	hl, #4+0
+   0030 39            [11]   89 	add	hl, sp
+   0031 7E            [ 7]   90 	ld	a, (hl)
+   0032 02            [ 7]   91 	ld	(bc),a
+   0033 C9            [10]   92 	ret
+                             93 ;pio.c:16: void pio_set_mode(int port, int mode, uint8_t io)
+                             94 ;	---------------------------------
+                             95 ; Function pio_set_mode
+                             96 ; ---------------------------------
+   0034                      97 _pio_set_mode::
+                             98 ;pio.c:19: _pio_control(port, ((mode << 6) | 0x0F));
+   0034 21 04 00      [10]   99 	ld	hl, #4+0
+   0037 39            [11]  100 	add	hl, sp
+   0038 7E            [ 7]  101 	ld	a, (hl)
+   0039 0F            [ 4]  102 	rrca
+   003A 0F            [ 4]  103 	rrca
+   003B E6 C0         [ 7]  104 	and	a,#0xc0
+   003D F6 0F         [ 7]  105 	or	a, #0x0f
+   003F 4F            [ 4]  106 	ld	c,a
+   0040 D1            [10]  107 	pop	de
+   0041 E1            [10]  108 	pop	hl
+   0042 E5            [11]  109 	push	hl
+   0043 D5            [11]  110 	push	de
+                            111 ;pio.c:13: *(pio_ctrl + port) = cmd;
+   0044 FD 2Ar02r00   [20]  112 	ld	iy,(_pio_ctrl)
+   0048 5D            [ 4]  113 	ld	e, l
+   0049 54            [ 4]  114 	ld	d, h
+   004A FD 19         [15]  115 	add	iy, de
+   004C FD 71 00      [19]  116 	ld	0 (iy), c
+                            117 ;pio.c:23: if (mode == PIO_MODE_BIT_IO) {
+   004F FD 21 04 00   [14]  118 	ld	iy,#4
+   0053 FD 39         [15]  119 	add	iy,sp
+   0055 FD 7E 00      [19]  120 	ld	a,0 (iy)
+   0058 D6 03         [ 7]  121 	sub	a, #0x03
+   005A C0            [11]  122 	ret	NZ
+   005B FD 7E 01      [19]  123 	ld	a,1 (iy)
+   005E B7            [ 4]  124 	or	a, a
+   005F C0            [11]  125 	ret	NZ
+                            126 ;pio.c:24: _pio_control(port, io);
+   0060 FD 21 06 00   [14]  127 	ld	iy,#6
+   0064 FD 39         [15]  128 	add	iy,sp
+   0066 FD 4E 00      [19]  129 	ld	c,0 (iy)
+                            130 ;pio.c:13: *(pio_ctrl + port) = cmd;
+   0069 ED 5Br02r00   [20]  131 	ld	de,(_pio_ctrl)
+   006D 19            [11]  132 	add	hl,de
+   006E 71            [ 7]  133 	ld	(hl),c
+                            134 ;pio.c:24: _pio_control(port, io);
+   006F C9            [10]  135 	ret
+                            136 ;pio.c:28: void pio_set_interrupts(int port, int control)
+                            137 ;	---------------------------------
+                            138 ; Function pio_set_interrupts
+                            139 ; ---------------------------------
+   0070                     140 _pio_set_interrupts::
+                            141 ;pio.c:31: _pio_control(port, (control | 0x07));
+   0070 21 04 00      [10]  142 	ld	hl, #4+0
+   0073 39            [11]  143 	add	hl, sp
+   0074 7E            [ 7]  144 	ld	a, (hl)
+   0075 F6 07         [ 7]  145 	or	a, #0x07
+   0077 4F            [ 4]  146 	ld	c,a
+   0078 D1            [10]  147 	pop	de
+   0079 E1            [10]  148 	pop	hl
+   007A E5            [11]  149 	push	hl
+   007B D5            [11]  150 	push	de
+                            151 ;pio.c:13: *(pio_ctrl + port) = cmd;
+   007C ED 5Br02r00   [20]  152 	ld	de,(_pio_ctrl)
+   0080 19            [11]  153 	add	hl,de
+   0081 71            [ 7]  154 	ld	(hl),c
+                            155 ;pio.c:31: _pio_control(port, (control | 0x07));
+   0082 C9            [10]  156 	ret
+                            157 ;pio.c:34: void pio_set_interrupts_mask(int port, int control, uint8_t mask)
+                            158 ;	---------------------------------
+                            159 ; Function pio_set_interrupts_mask
+                            160 ; ---------------------------------
+   0083                     161 _pio_set_interrupts_mask::
+                            162 ;pio.c:38: _pio_control(port, (control | 0x17));
+   0083 21 04 00      [10]  163 	ld	hl, #4+0
+   0086 39            [11]  164 	add	hl, sp
+   0087 7E            [ 7]  165 	ld	a, (hl)
+   0088 F6 17         [ 7]  166 	or	a, #0x17
+   008A 4F            [ 4]  167 	ld	c,a
+   008B D1            [10]  168 	pop	de
+   008C E1            [10]  169 	pop	hl
+   008D E5            [11]  170 	push	hl
+   008E D5            [11]  171 	push	de
+                            172 ;pio.c:13: *(pio_ctrl + port) = cmd;
+   008F FD 2Ar02r00   [20]  173 	ld	iy,(_pio_ctrl)
+   0093 5D            [ 4]  174 	ld	e, l
+   0094 54            [ 4]  175 	ld	d, h
+   0095 FD 19         [15]  176 	add	iy, de
+   0097 FD 71 00      [19]  177 	ld	0 (iy), c
+                            178 ;pio.c:39: _pio_control(port, mask);
+   009A FD 21 06 00   [14]  179 	ld	iy,#6
+   009E FD 39         [15]  180 	add	iy,sp
+   00A0 FD 4E 00      [19]  181 	ld	c,0 (iy)
+                            182 ;pio.c:13: *(pio_ctrl + port) = cmd;
+   00A3 ED 5Br02r00   [20]  183 	ld	de,(_pio_ctrl)
+   00A7 19            [11]  184 	add	hl,de
+   00A8 71            [ 7]  185 	ld	(hl),c
+                            186 ;pio.c:39: _pio_control(port, mask);
+   00A9 C9            [10]  187 	ret
+                            188 	.area _CODE
+                            189 	.area _INITIALIZER
+   0000                     190 __xinit__pio_port:
+   0000 00 42               191 	.dw #0x4200
+   0002                     192 __xinit__pio_ctrl:
+   0002 02 42               193 	.dw #0x4202
+                            194 	.area _CABS (ABS)
diff --git a/sw/z80_tests/usart/build/pio.rel b/sw/z80_tests/usart/build/pio.rel
new file mode 100644
index 0000000..90210a9
--- /dev/null
+++ b/sw/z80_tests/usart/build/pio.rel
@@ -0,0 +1,73 @@
+XL2
+H 9 areas 6 global symbols
+M pio
+O -mz80
+S .__.ABS. Def0000
+A _CODE size AA flags 0 addr 0
+S _pio_set_interrupts Def0070
+S _pio_set_mode Def0034
+S _pio_set_interrupts_mask Def0083
+S __pio_control Def001A
+S __pio_data Def0000
+A _DATA size 0 flags 0 addr 0
+A _INITIALIZED size 4 flags 0 addr 0
+A _DABS size 0 flags 8 addr 0
+A _HOME size 0 flags 0 addr 0
+A _GSINIT size 0 flags 0 addr 0
+A _GSFINAL size 0 flags 0 addr 0
+A _INITIALIZER size 4 flags 0 addr 0
+A _CABS size 0 flags 8 addr 0
+T 00 00
+R 00 00 02 00
+T 00 00
+R 00 00 02 00
+T 02 00
+R 00 00 02 00
+T 02 00
+R 00 00 02 00
+T 00 00
+R 00 00 00 00
+T 00 00 21 02 00 39 FD 21 00 00 FD 7E 00 86 4F FD
+R 00 00 00 00 00 08 02 00
+T 0E 00 7E 01 23 8E 47 21 04 00 39 7E 02 C9
+R 00 00 00 00
+T 1A 00
+R 00 00 00 00
+T 1A 00 21 02 00 39 FD 21 02 00 FD 7E 00 86 4F FD
+R 00 00 00 00 00 08 02 00
+T 28 00 7E 01 23 8E 47 21 04 00 39 7E 02 C9
+R 00 00 00 00
+T 34 00
+R 00 00 00 00
+T 34 00 21 04 00 39 7E 0F 0F E6 C0 F6 0F 4F D1 E1
+R 00 00 00 00
+T 42 00 E5 D5 FD 2A 02 00 5D 54 FD 19 FD 71 00 FD
+R 00 00 00 00 00 06 02 00
+T 50 00 21 04 00 FD 39 FD 7E 00 D6 03 C0 FD 7E 01
+R 00 00 00 00
+T 5E 00 B7 C0 FD 21 06 00 FD 39 FD 4E 00 ED 5B
+R 00 00 00 00
+T 6B 00 02 00 19 71 C9
+R 00 00 00 00 00 02 02 00
+T 70 00
+R 00 00 00 00
+T 70 00 21 04 00 39 7E F6 07 4F D1 E1 E5 D5 ED 5B
+R 00 00 00 00
+T 7E 00 02 00 19 71 C9
+R 00 00 00 00 00 02 02 00
+T 83 00
+R 00 00 00 00
+T 83 00 21 04 00 39 7E F6 17 4F D1 E1 E5 D5 FD 2A
+R 00 00 00 00
+T 91 00 02 00 5D 54 FD 19 FD 71 00 FD 21 06 00 FD
+R 00 00 00 00 00 02 02 00
+T 9F 00 39 FD 4E 00 ED 5B 02 00 19 71 C9
+R 00 00 00 00 00 08 02 00
+T 00 00
+R 00 00 07 00
+T 00 00 00 42
+R 00 00 07 00
+T 02 00
+R 00 00 07 00
+T 02 00 02 42
+R 00 00 07 00
diff --git a/sw/z80_tests/usart/build/pio.sym b/sw/z80_tests/usart/build/pio.sym
new file mode 100644
index 0000000..3cf582f
--- /dev/null
+++ b/sw/z80_tests/usart/build/pio.sym
@@ -0,0 +1,35 @@
+ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 1.
+Hexadecimal [16-Bits]
+
+Symbol Table
+
+    .__.$$$.                                                    =  2710 L
+    .__.ABS.                                                    =  0000 G
+    .__.CPU.                                                    =  0000 L
+    .__.H$L.                                                    =  0000 L
+  0 __pio_control                                                  001A GR
+  0 __pio_data                                                     0000 GR
+  7 __xinit__pio_ctrl                                              0002 R
+  7 __xinit__pio_port                                              0000 R
+  2 _pio_ctrl                                                      0002 R
+  2 _pio_port                                                      0000 R
+  0 _pio_set_interrupts                                            0070 GR
+  0 _pio_set_interrupts_mask                                       0083 GR
+  0 _pio_set_mode                                                  0034 GR
+
+
+ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 2.
+Hexadecimal [16-Bits]
+
+Area Table
+
+   0 _CODE                                      size   AA   flags    0
+   1 _DATA                                      size    0   flags    0
+   2 _INITIALIZED                               size    4   flags    0
+   3 _DABS                                      size    0   flags    8
+   4 _HOME                                      size    0   flags    0
+   5 _GSINIT                                    size    0   flags    0
+   6 _GSFINAL                                   size    0   flags    0
+   7 _INITIALIZER                               size    4   flags    0
+   8 _CABS                                      size    0   flags    8
+
diff --git a/sw/z80_tests/usart/build/sample.lk b/sw/z80_tests/usart/build/sample.lk
new file mode 100644
index 0000000..dc99ff1
--- /dev/null
+++ b/sw/z80_tests/usart/build/sample.lk
@@ -0,0 +1,12 @@
+-mjwx
+-i build/sample.hex
+-b _CODE = 0x0800
+-b _DATA = 0x2000
+-k /usr/libexec/../share/sdcc/lib/z80
+-k /usr/share/sdcc/lib/z80
+-l z80
+build/crt0.rel
+build/main.rel
+build/usart.rel
+
+-e
diff --git a/sw/z80_tests/usart/build/sample.map b/sw/z80_tests/usart/build/sample.map
new file mode 100644
index 0000000..e812f09
--- /dev/null
+++ b/sw/z80_tests/usart/build/sample.map
@@ -0,0 +1,212 @@
+ASxxxx Linker V03.00 + NoICE + sdld,  page 1.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+.  .ABS.                            00000000    00000000 =           0. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+     00000000  .__.ABS.                           usart
+     00000000  l__BSEG                         
+     00000000  l__BSS                          
+     00000000  l__CABS                         
+     00000000  l__DABS                         
+     00000000  l__DATA                         
+     00000000  l__HEADER                       
+     00000000  l__HEAP                         
+     00000000  l__HOME                         
+     00000000  s__CABS                         
+     00000000  s__DABS                         
+     00000000  s__HEADER                       
+     00000000  s__HEADER0                      
+     00000000  s__HEADER1                      
+     00000000  s__HEADER2                      
+     00000000  s__HEADER3                      
+     00000000  s__HEADER4                      
+     00000000  s__HEADER5                      
+     00000000  s__HEADER6                      
+     00000000  s__HEADER7                      
+     00000000  s__HEADER8                      
+     00000001  l__GSFINAL                      
+     00000002  l__HEADER1                      
+     00000002  l__HEADER2                      
+     00000002  l__HEADER3                      
+     00000002  l__HEADER4                      
+     00000002  l__HEADER5                      
+     00000002  l__HEADER6                      
+     00000002  l__HEADER7                      
+     00000002  l__INITIALIZED                  
+     00000002  l__INITIALIZER                  
+     00000003  l__HEADER0                      
+     00000006  l__GSINIT                       
+     0000000C  l__HEADER8                      
+     00000264  l__CODE                         
+     00000800  s__CODE                         
+     00000A64  s__HOME                         
+     00000A64  s__INITIALIZER                  
+     00000A66  s__GSINIT                       
+     00000A6C  s__GSFINAL                      
+     00002000  s__DATA                         
+     00002000  s__INITIALIZED                  
+     00002002  s__BSEG                         
+     00002002  s__BSS                          
+     00002002  s__HEAP                         
+ASxxxx Linker V03.00 + NoICE + sdld,  page 2.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_CODE                               00000800    00000264 =         612. bytes (REL,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+     00000800  __clock                            crt0
+     00000804  _exit                              crt0
+     0000080A  _main                              main
+     0000084D  _usart_set_baudrate                usart
+     00000881  _usart_set_parity                  usart
+     000008D5  _usart_set_stop_bits               usart
+     00000902  _usart_word_length                 usart
+     0000091B  _usart_set_autoflow                usart
+     00000955  _usart_init                        usart
+     0000097E  _usart_transmit                    usart
+     00000999  _usart_receive                     usart
+     0000099E  _usart_write                       usart
+     000009E5  _usart_read                        usart
+
+ASxxxx Linker V03.00 + NoICE + sdld,  page 3.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER0                            00000000    00000003 =           3. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 4.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER1                            00000000    00000002 =           2. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 5.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER2                            00000000    00000002 =           2. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 6.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER3                            00000000    00000002 =           2. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 7.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER4                            00000000    00000002 =           2. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 8.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER5                            00000000    00000002 =           2. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 9.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER6                            00000000    00000002 =           2. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 10.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER7                            00000000    00000002 =           2. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 11.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_HEADER8                            00000000    0000000C =          12. bytes (ABS,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 12.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_INITIALIZER                        00000A64    00000002 =           2. bytes (REL,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 13.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_GSINIT                             00000A66    00000006 =           6. bytes (REL,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+     00000A66  gsinit                             crt0
+
+ASxxxx Linker V03.00 + NoICE + sdld,  page 14.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_GSFINAL                            00000A6C    00000001 =           1. bytes (REL,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 15.
+Hexadecimal  [32-Bits]
+
+Area                                    Addr        Size        Decimal Bytes (Attributes)
+--------------------------------        ----        ----        ------- ----- ------------
+_INITIALIZED                        00002000    00000002 =           2. bytes (REL,CON)
+
+      Value  Global                              Global Defined In Module
+      -----  --------------------------------   ------------------------
+ASxxxx Linker V03.00 + NoICE + sdld,  page 16.
+
+Files Linked                              [ module(s) ]
+
+build/crt0.rel                            [ crt0 ]
+build/main.rel                            [ main ]
+build/usart.rel                           [ usart ]
+
+ASxxxx Linker V03.00 + NoICE + sdld,  page 17.
+
+User Base Address Definitions
+
+_CODE = 0x0800
+_DATA = 0x2000
+
+
\ No newline at end of file
diff --git a/sw/z80_tests/usart/build/sample.noi b/sw/z80_tests/usart/build/sample.noi
new file mode 100644
index 0000000..6d97288
--- /dev/null
+++ b/sw/z80_tests/usart/build/sample.noi
@@ -0,0 +1,60 @@
+DEF .__.ABS. 0x0
+DEF l__BSEG 0x0
+DEF l__BSS 0x0
+DEF l__CABS 0x0
+DEF l__DABS 0x0
+DEF l__DATA 0x0
+DEF l__HEADER 0x0
+DEF l__HEAP 0x0
+DEF l__HOME 0x0
+DEF s__CABS 0x0
+DEF s__DABS 0x0
+DEF s__HEADER 0x0
+DEF s__HEADER0 0x0
+DEF s__HEADER1 0x0
+DEF s__HEADER2 0x0
+DEF s__HEADER3 0x0
+DEF s__HEADER4 0x0
+DEF s__HEADER5 0x0
+DEF s__HEADER6 0x0
+DEF s__HEADER7 0x0
+DEF s__HEADER8 0x0
+DEF l__GSFINAL 0x1
+DEF l__HEADER1 0x2
+DEF l__HEADER2 0x2
+DEF l__HEADER3 0x2
+DEF l__HEADER4 0x2
+DEF l__HEADER5 0x2
+DEF l__HEADER6 0x2
+DEF l__HEADER7 0x2
+DEF l__INITIALIZED 0x2
+DEF l__INITIALIZER 0x2
+DEF l__HEADER0 0x3
+DEF l__GSINIT 0x6
+DEF l__HEADER8 0xC
+DEF l__CODE 0x264
+DEF s__CODE 0x800
+DEF s__HOME 0xA64
+DEF s__INITIALIZER 0xA64
+DEF s__GSINIT 0xA66
+DEF s__GSFINAL 0xA6C
+DEF s__DATA 0x2000
+DEF s__INITIALIZED 0x2000
+DEF s__BSEG 0x2002
+DEF s__BSS 0x2002
+DEF s__HEAP 0x2002
+DEF __clock 0x800
+DEF _exit 0x804
+DEF _main 0x80A
+DEF _usart_set_baudrate 0x84D
+DEF _usart_set_parity 0x881
+DEF _usart_set_stop_bits 0x8D5
+DEF _usart_word_length 0x902
+DEF _usart_set_autoflow 0x91B
+DEF _usart_init 0x955
+DEF _usart_transmit 0x97E
+DEF _usart_receive 0x999
+DEF _usart_write 0x99E
+DEF _usart_read 0x9E5
+DEF gsinit 0xA66
+LOAD build/sample.ihx
diff --git a/sw/z80_tests/usart/build/sample.z80 b/sw/z80_tests/usart/build/sample.z80
new file mode 100644
index 0000000..965a0d8
--- /dev/null
+++ b/sw/z80_tests/usart/build/sample.z80
@@ -0,0 +1,558 @@
+;
+;  DZ80 V3.4.1 Z80 Disassembly of build/sample.bin
+;  2017/09/25 17:08
+;
+	org	0x0
+;
+X0000:	jp	X0100
+;
+	org	0x4
+;
+X0004:	rst	0x38
+X0005:	rst	0x38
+X0006:	rst	0x38
+;
+	org	0x8
+;
+	reti
+;
+X000a:	rst	0x38
+;
+	org	0xc
+;
+X000c:	rst	0x38
+X000d:	rst	0x38
+;
+	org	0x10
+;
+	reti
+;
+	rst	0x38
+;
+	org	0x18
+;
+	reti
+;
+	rst	0x38
+;
+	org	0x20
+;
+	reti
+;
+	rst	0x38
+;
+	org	0x28
+;
+	reti
+;
+	rst	0x38
+;
+	org	0x30
+;
+	reti
+;
+	rst	0x38
+;
+	org	0x38
+;
+	reti
+;
+	rst	0x38
+;
+	org	0x100
+;
+X0100:	ld	sp,X0000
+	call	X0b15
+	call	X08b4
+	jp	X0804
+;
+	org	0x800
+;
+	ld	a,0x2
+	rst	8
+	ret
+;
+X0804:	ld	a,0x0
+	rst	8
+X0807:	halt
+;
+	jr	X0807
+;
+	ld	hl,X0002
+	add	hl,sp
+	ld	iy,X2000
+	ld	a,(iy+0x0)
+	add	a,(hl)
+	ld	c,a
+	ld	a,(iy+0x1)
+	inc	hl
+	adc	a,(hl)
+	ld	b,a
+	ld	hl,X0004
+	add	hl,sp
+	ld	a,(hl)
+	ld	(bc),a
+	ret
+;
+	ld	hl,X0002
+	add	hl,sp
+	ld	iy,X2002
+	ld	a,(iy+0x0)
+	add	a,(hl)
+	ld	c,a
+	ld	a,(iy+0x1)
+	inc	hl
+	adc	a,(hl)
+	ld	b,a
+	ld	hl,X0004
+	add	hl,sp
+	ld	a,(hl)
+	ld	(bc),a
+	ret
+;
+	ld	hl,X0004
+	add	hl,sp
+	ld	a,(hl)
+	rrca
+	rrca
+	and	0xc0
+	or	0xf
+	ld	c,a
+	pop	de
+	pop	hl
+	push	hl
+	push	de
+	ld	iy,(X2002)
+	ld	e,l
+	ld	d,h
+	add	iy,de
+	ld	(iy+0x0),c
+	ld	iy,X0004
+	add	iy,sp
+	ld	a,(iy+0x0)
+	sub	0x3
+	ret	nz
+	ld	a,(iy+0x1)
+	or	a
+	ret	nz
+	ld	iy,X0006
+	add	iy,sp
+	ld	c,(iy+0x0)
+	ld	de,(X2002)
+	add	hl,de
+	ld	(hl),c
+	ret
+;
+	ld	hl,X0004
+	add	hl,sp
+	ld	a,(hl)
+	or	0x7
+	ld	c,a
+	pop	de
+	pop	hl
+	push	hl
+	push	de
+	ld	de,(X2002)
+	add	hl,de
+	ld	(hl),c
+	ret
+;
+	ld	hl,X0004
+	add	hl,sp
+	ld	a,(hl)
+	or	0x17
+	ld	c,a
+	pop	de
+	pop	hl
+	push	hl
+	push	de
+	ld	iy,(X2002)
+	ld	e,l
+	ld	d,h
+	add	iy,de
+	ld	(iy+0x0),c
+	ld	iy,X0006
+	add	iy,sp
+	ld	c,(iy+0x0)
+	ld	de,(X2002)
+	add	hl,de
+	ld	(hl),c
+	ret
+;
+X08b4:	ld	hl,X000a
+	push	hl
+	ld	l,0x1
+	push	hl
+	ld	l,0x60
+	push	hl
+	call	X0a00
+	ld	hl,X0006
+	add	hl,sp
+	ld	sp,hl
+	ld	hl,X000d
+	push	hl
+	ld	hl,X08e2
+	push	hl
+	call	X0a49
+	pop	af
+	pop	af
+X08d3:	ld	hl,X0005
+	push	hl
+	ld	hl,X08f1
+	push	hl
+	call	X0a49
+	pop	af
+	pop	af
+	jr	X08d3
+;
+X08e2:	ld	c,b
+	ld	h,l
+	ld	l,h
+	ld	l,h
+	ld	l,a
+	inc	l
+	jr	nz,X0941
+	ld	l,a
+	ld	(hl),d
+	ld	l,h
+	ld	h,h
+	ld	hl,X000a
+X08f1:	ld	h,h
+	ld	l,a
+	ld	l,(hl)
+	ld	h,l
+	ld	a,(bc)
+	nop
+	ret
+;
+X08f8:	push	ix
+	ld	ix,X0000
+	add	ix,sp
+	ld	hl,(X2004)
+	ld	bc,X0004
+	add	hl,bc
+	ld	a,(hl)
+	or	0x80
+	ld	(hl),a
+	ld	hl,(X2004)
+	ld	c,(ix+0x4)
+	ld	(hl),c
+	ld	de,(X2004)
+	inc	de
+	ld	l,(ix+0x5)
+	ld	h,0x0
+	ld	a,(hl)
+	ld	(de),a
+	ld	hl,(X2004)
+	ld	bc,X0004
+	add	hl,bc
+	ld	a,(hl)
+	and	0x7f
+	ld	(hl),a
+	pop	ix
+	ret
+;
+X092c:	ld	hl,(X2004)
+	ld	bc,X0004
+	add	hl,bc
+	ld	iy,X0002
+	add	iy,sp
+	ld	a,(iy+0x0)
+	dec	a
+	jr	nz,X094b
+	ld	a,(iy+0x1)
+	or	a
+	jr	nz,X094b
+	ld	a,(hl)
+	or	0x10
+	ld	(hl),a
+	jr	X0962
+;
+X094b:	ld	iy,X0002
+	add	iy,sp
+	ld	a,(iy+0x0)
+	sub	0x2
+	jr	nz,X0962
+	ld	a,(iy+0x1)
+	or	a
+	jr	nz,X0962
+	ld	a,(hl)
+	and	0xef
+	ld	(hl),a
+X0962:	ld	hl,(X2004)
+	ld	bc,X0004
+	add	hl,bc
+	ld	iy,X0002
+	add	iy,sp
+	ld	a,(iy+0x0)
+	rlca
+	rlca
+	rlca
+	and	0xf8
+	and	0x8
+	ld	c,a
+	ld	a,(hl)
+	and	0xf7
+	or	c
+	ld	(hl),a
+	ret
+;
+X0980:	ld	bc,(X2004)
+	inc	bc
+	inc	bc
+	inc	bc
+	inc	bc
+	ld	iy,X0002
+	add	iy,sp
+	ld	a,(iy+0x0)
+	sub	0xa
+	jr	nz,X099f
+	ld	a,(iy+0x1)
+	or	a
+	jr	nz,X099f
+	ld	a,0x1
+	jr	X09a0
+;
+X099f:	xor	a
+X09a0:	xor	0x1
+	add	a,a
+	add	a,a
+	and	0x4
+	ld	l,a
+	ld	a,(bc)
+	and	0xfb
+	or	l
+	ld	(bc),a
+	ret
+;
+	ld	hl,(X2004)
+	ld	bc,X0004
+	add	hl,bc
+	ld	iy,X0002
+	add	iy,sp
+	ld	a,(iy+0x0)
+	and	0x3
+	ld	c,a
+	ld	a,(hl)
+	and	0xfc
+	or	c
+	ld	(hl),a
+	ret
+;
+X09c6:	ld	hl,(X2004)
+	ld	bc,X000c
+	add	hl,bc
+	ld	iy,X0002
+	add	iy,sp
+	ld	a,(iy+0x0)
+	and	0x1
+	ld	c,a
+	ld	a,(hl)
+	and	0xfe
+	or	c
+	ld	(hl),a
+	ld	hl,(X2004)
+	ld	bc,X0005
+	add	hl,bc
+	ld	a,(iy+0x0)
+	sub	0x3
+	jr	nz,X09f6
+	ld	a,(iy+0x1)
+	or	a
+	jr	nz,X09f6
+	ld	a,0x1
+	jr	X09f7
+;
+X09f6:	xor	a
+X09f7:	and	0x1
+	ld	c,a
+	ld	a,(hl)
+	and	0xfe
+	or	c
+	ld	(hl),a
+	ret
+;
+X0a00:	pop	bc
+	pop	hl
+	push	hl
+	push	bc
+	push	hl
+	call	X08f8
+	pop	af
+	ld	hl,X0004
+	add	hl,sp
+	ld	c,(hl)
+	inc	hl
+	ld	b,(hl)
+	push	bc
+	call	X092c
+	pop	af
+	ld	hl,X0006
+	add	hl,sp
+	ld	c,(hl)
+	inc	hl
+	ld	b,(hl)
+	push	bc
+	call	X0980
+	ld	hl,X0000
+	ex	(sp),hl
+	call	X09c6
+	pop	af
+	ret
+;
+	ld	hl,(X2004)
+	ld	iy,X0002
+	add	iy,sp
+	ld	a,(iy+0x0)
+	ld	(hl),a
+X0a36:	ld	hl,(X2004)
+	ld	bc,X000d
+	add	hl,bc
+	ld	a,(hl)
+	rlca
+	rlca
+	rlca
+	jr	nc,X0a36
+	ret
+;
+	ld	hl,(X2004)
+	ld	l,(hl)
+	ret
+;
+X0a49:	push	ix
+	ld	ix,X0000
+	add	ix,sp
+	push	af
+	ld	a,(ix+0x4)
+	ld	(ix+0xfe),a
+	ld	a,(ix+0x5)
+	ld	(ix+0xff),a
+	ld	c,(ix+0x6)
+	ld	b,(ix+0x7)
+X0a64:	ld	e,c
+	ld	d,b
+	dec	bc
+	ld	a,d
+	or	e
+	jr	z,X0a89
+	ld	de,(X2004)
+	pop	hl
+	push	hl
+	ld	a,(hl)
+	inc	(ix+0xfe)
+	jr	nz,X0a7a
+	inc	(ix+0xff)
+X0a7a:	ld	(de),a
+X0a7b:	ld	hl,(X2004)
+	ld	de,X000d
+	add	hl,de
+	ld	a,(hl)
+	rlca
+	rlca
+	jr	nc,X0a64
+	jr	X0a7b
+;
+X0a89:	ld	l,c
+	ld	h,b
+	ld	sp,ix
+	pop	ix
+	ret
+;
+	push	ix
+	ld	ix,X0000
+	add	ix,sp
+	ld	hl,Xfffa
+	add	hl,sp
+	ld	sp,hl
+	ld	a,(ix+0x4)
+	ld	(ix+0xfa),a
+	ld	a,(ix+0x5)
+	ld	(ix+0xfb),a
+	ld	c,(ix+0x6)
+	ld	b,(ix+0x7)
+	ld	(ix+0xfc),0x0
+	ld	(ix+0xfd),0x0
+X0ab7:	ld	e,c
+	ld	d,b
+	dec	bc
+	ld	a,d
+	or	e
+	jr	z,X0b06
+	ld	hl,(X2004)
+	ld	e,(hl)
+	pop	hl
+	push	hl
+	ld	(hl),e
+	inc	(ix+0xfa)
+	jr	nz,X0acd
+	inc	(ix+0xfb)
+X0acd:	ld	de,(X2004)
+	ld	hl,X000d
+	add	hl,de
+	ld	(ix+0xfe),l
+	ld	(ix+0xff),h
+	ld	l,(ix+0xfe)
+	ld	h,(ix+0xff)
+	ld	a,(hl)
+	rrca
+	rrca
+	rrca
+	and	0x1
+	jr	nz,X0af6
+	ld	l,(ix+0xfe)
+	ld	h,(ix+0xff)
+	ld	a,(hl)
+	rrca
+	rrca
+	and	0x1
+	jr	z,X0afc
+X0af6:	pop	hl
+	push	hl
+	dec	hl
+	ex	(sp),hl
+	jr	X0ab7
+;
+X0afc:	inc	(ix+0xfc)
+	jr	nz,X0ab7
+	inc	(ix+0xfd)
+	jr	X0ab7
+;
+X0b06:	pop	bc
+	pop	hl
+	push	hl
+	push	bc
+	ld	sp,ix
+	pop	ix
+	ret
+;
+X0b0f:	nop
+	ld	b,d
+	ld	(bc),a
+	ld	b,d
+	nop
+	ld	b,b
+X0b15:	ld	bc,X0006
+	ld	a,b
+	or	c
+	jr	z,X0b24
+	ld	de,X2000
+	ld	hl,X0b0f
+	ldir
+X0b24:	ret
+;
+	rst	0x38
+;
+;	Miscellaneous equates
+;
+;  These are addresses referenced in the code but
+;  which are in the middle of a multibyte instruction
+;  or are addresses outside the initialized space
+;
+X0002	equ	0x2
+X2002	equ	0x2002
+X2004	equ	0x2004
+Xfffa	equ	0xfffa
+;
+	end
+;
+
diff --git a/sw/z80_tests/usart/build/usart.asm b/sw/z80_tests/usart/build/usart.asm
new file mode 100644
index 0000000..58d6fdf
--- /dev/null
+++ b/sw/z80_tests/usart/build/usart.asm
@@ -0,0 +1,441 @@
+;--------------------------------------------------------
+; File Created by SDCC : free open source ANSI-C Compiler
+; Version 3.6.0 #9615 (Linux)
+;--------------------------------------------------------
+	.module usart
+	.optsdcc -mz80
+	
+;--------------------------------------------------------
+; Public variables in this module
+;--------------------------------------------------------
+	.globl _usart_word_length
+	.globl _usart_set_baudrate
+	.globl _usart_set_parity
+	.globl _usart_set_stop_bits
+	.globl _usart_set_autoflow
+	.globl _usart_init
+	.globl _usart_transmit
+	.globl _usart_receive
+	.globl _usart_write
+	.globl _usart_read
+;--------------------------------------------------------
+; special function registers
+;--------------------------------------------------------
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+	.area _DATA
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+	.area _INITIALIZED
+__usart:
+	.ds 2
+;--------------------------------------------------------
+; absolute external ram data
+;--------------------------------------------------------
+	.area _DABS (ABS)
+;--------------------------------------------------------
+; global & static initialisations
+;--------------------------------------------------------
+	.area _HOME
+	.area _GSINIT
+	.area _GSFINAL
+	.area _GSINIT
+;--------------------------------------------------------
+; Home
+;--------------------------------------------------------
+	.area _HOME
+	.area _HOME
+;--------------------------------------------------------
+; code
+;--------------------------------------------------------
+	.area _CODE
+;usart.c:5: void usart_set_baudrate(uint16_t baudrate)
+;	---------------------------------
+; Function usart_set_baudrate
+; ---------------------------------
+_usart_set_baudrate::
+	push	ix
+	ld	ix,#0
+	add	ix,sp
+;usart.c:8: _usart->LCR.divisor_latch_access = 1;
+	ld	hl,(__usart)
+	ld	bc,#0x0004
+	add	hl,bc
+	ld	a,(hl)
+	or	a,#0x80
+	ld	(hl),a
+;usart.c:9: _usart->buffer = 0x00FF & baudrate; // LSBs
+	ld	hl,(__usart)
+	ld	c,4 (ix)
+	ld	(hl),c
+;usart.c:10: memcpy(&_usart->IER, &(baudrate >>8), 1);
+	ld	de,(__usart)
+	inc	de
+	ld	l,5 (ix)
+	ld	h,#0x00
+	ld	a, (hl)
+	ld	(de), a
+;usart.c:12: _usart->LCR.divisor_latch_access = 0;
+	ld	hl,(__usart)
+	ld	bc,#0x0004
+	add	hl,bc
+	ld	a,(hl)
+	and	a,#0x7f
+	ld	(hl),a
+	pop	ix
+	ret
+;usart.c:15: void usart_set_parity(int mode)
+;	---------------------------------
+; Function usart_set_parity
+; ---------------------------------
+_usart_set_parity::
+;usart.c:18: _usart->LCR.even_parity = 1;
+	ld	hl,(__usart)
+	ld	bc,#0x0004
+	add	hl,bc
+;usart.c:17: if (mode == USART_PARITY_EVEN) {
+	ld	iy,#2
+	add	iy,sp
+	ld	a,0 (iy)
+	dec	a
+	jr	NZ,00104$
+	ld	a,1 (iy)
+	or	a, a
+	jr	NZ,00104$
+;usart.c:18: _usart->LCR.even_parity = 1;
+	ld	a,(hl)
+	or	a,#0x10
+	ld	(hl),a
+	jr	00105$
+00104$:
+;usart.c:20: else if (mode == USART_PARITY_ODD) {
+	ld	iy,#2
+	add	iy,sp
+	ld	a,0 (iy)
+	sub	a, #0x02
+	jr	NZ,00105$
+	ld	a,1 (iy)
+	or	a, a
+	jr	NZ,00105$
+;usart.c:21: _usart->LCR.even_parity = 0;
+	ld	a,(hl)
+	and	a,#0xef
+	ld	(hl),a
+00105$:
+;usart.c:24: _usart->LCR.parity = (mode == USART_PARITY_NONE) ? 0 : 1;
+	ld	hl,(__usart)
+	ld	bc,#0x0004
+	add	hl,bc
+	ld	iy,#2
+	add	iy,sp
+	ld	a,0 (iy)
+	rlca
+	rlca
+	rlca
+	and	a,#0xf8
+	and	a,#0x08
+	ld	c,a
+	ld	a,(hl)
+	and	a,#0xf7
+	or	a,c
+	ld	(hl),a
+	ret
+;usart.c:27: void usart_set_stop_bits(int count)
+;	---------------------------------
+; Function usart_set_stop_bits
+; ---------------------------------
+_usart_set_stop_bits::
+;usart.c:29: _usart->LCR.stop_bits = (count == USART_STOP_BITS_1) ? 0 : 1;
+	ld	bc,(__usart)
+	inc	bc
+	inc	bc
+	inc	bc
+	inc	bc
+	ld	iy,#2
+	add	iy,sp
+	ld	a,0 (iy)
+	sub	a, #0x0a
+	jr	NZ,00103$
+	ld	a,1 (iy)
+	or	a, a
+	jr	NZ,00103$
+	ld	a,#0x01
+	jr	00104$
+00103$:
+	xor	a,a
+00104$:
+	xor	a, #0x01
+	add	a, a
+	add	a, a
+	and	a,#0x04
+	ld	l,a
+	ld	a,(bc)
+	and	a,#0xfb
+	or	a,l
+	ld	(bc),a
+	ret
+;usart.c:32: void usart_word_length(int length)
+;	---------------------------------
+; Function usart_word_length
+; ---------------------------------
+_usart_word_length::
+;usart.c:34: _usart->LCR.word_length = length;
+	ld	hl,(__usart)
+	ld	bc,#0x0004
+	add	hl,bc
+	ld	iy,#2
+	add	iy,sp
+	ld	a,0 (iy)
+	and	a,#0x03
+	ld	c,a
+	ld	a,(hl)
+	and	a,#0xfc
+	or	a,c
+	ld	(hl),a
+	ret
+;usart.c:37: void usart_set_autoflow(int mode)
+;	---------------------------------
+; Function usart_set_autoflow
+; ---------------------------------
+_usart_set_autoflow::
+;usart.c:39: _usart->MCR.autoflow = (mode == USART_AUTOFLOW_OFF) ? 0 : 1;
+	ld	hl,(__usart)
+	ld	bc,#0x000c
+	add	hl,bc
+	ld	iy,#2
+	add	iy,sp
+	ld	a,0 (iy)
+	and	a,#0x01
+	ld	c,a
+	ld	a,(hl)
+	and	a,#0xfe
+	or	a,c
+	ld	(hl),a
+;usart.c:40: _usart->MCR.data_terminal_ready = (mode == USART_AUTOFLOW_ALL);
+	ld	hl,(__usart)
+	ld	bc,#0x0005
+	add	hl,bc
+	ld	a,0 (iy)
+	sub	a, #0x03
+	jr	NZ,00103$
+	ld	a,1 (iy)
+	or	a, a
+	jr	NZ,00103$
+	ld	a,#0x01
+	jr	00104$
+00103$:
+	xor	a,a
+00104$:
+	and	a,#0x01
+	ld	c,a
+	ld	a,(hl)
+	and	a,#0xfe
+	or	a,c
+	ld	(hl),a
+	ret
+;usart.c:43: inline void usart_init(uint16_t baudrate, int parity, int stop_bits)
+;	---------------------------------
+; Function usart_init
+; ---------------------------------
+_usart_init::
+;usart.c:45: usart_set_baudrate(baudrate);
+	pop	bc
+	pop	hl
+	push	hl
+	push	bc
+	push	hl
+	call	_usart_set_baudrate
+	pop	af
+;usart.c:46: usart_set_parity(parity);
+	ld	hl, #4
+	add	hl, sp
+	ld	c, (hl)
+	inc	hl
+	ld	b, (hl)
+	push	bc
+	call	_usart_set_parity
+	pop	af
+;usart.c:47: usart_set_stop_bits(stop_bits);
+	ld	hl, #6
+	add	hl, sp
+	ld	c, (hl)
+	inc	hl
+	ld	b, (hl)
+	push	bc
+	call	_usart_set_stop_bits
+;usart.c:48: usart_set_autoflow(USART_AUTOFLOW_OFF);
+	ld	hl, #0x0000
+	ex	(sp),hl
+	call	_usart_set_autoflow
+	pop	af
+	ret
+;usart.c:51: void usart_transmit(uint8_t data)
+;	---------------------------------
+; Function usart_transmit
+; ---------------------------------
+_usart_transmit::
+;usart.c:53: _usart->buffer = data;
+	ld	hl,(__usart)
+	ld	iy,#2
+	add	iy,sp
+	ld	a,0 (iy)
+	ld	(hl),a
+;usart.c:54: while (_usart->LSR.transmitter_holder_empty == 0); // wait
+00101$:
+	ld	hl,(__usart)
+	ld	bc,#0x000d
+	add	hl,bc
+	ld	a,(hl)
+	rlca
+	rlca
+	rlca
+	jr	NC,00101$
+	ret
+;usart.c:57: uint8_t usart_receive()
+;	---------------------------------
+; Function usart_receive
+; ---------------------------------
+_usart_receive::
+;usart.c:59: return _usart->buffer;
+	ld	hl,(__usart)
+	ld	l,(hl)
+	ret
+;usart.c:62: int usart_write(uint8_t *data, size_t size)
+;	---------------------------------
+; Function usart_write
+; ---------------------------------
+_usart_write::
+	push	ix
+	ld	ix,#0
+	add	ix,sp
+	push	af
+;usart.c:64: uint8_t *dp = data;
+	ld	a,4 (ix)
+	ld	-2 (ix),a
+	ld	a,5 (ix)
+	ld	-1 (ix),a
+;usart.c:66: while (size--) {
+	ld	c,6 (ix)
+	ld	b,7 (ix)
+00104$:
+	ld	e, c
+	ld	d, b
+	dec	bc
+	ld	a,d
+	or	a,e
+	jr	Z,00106$
+;usart.c:67: _usart->buffer = *(dp++);
+	ld	de,(__usart)
+	pop	hl
+	push	hl
+	ld	a,(hl)
+	inc	-2 (ix)
+	jr	NZ,00126$
+	inc	-1 (ix)
+00126$:
+	ld	(de),a
+;usart.c:68: while (_usart->LSR.transmitter_empty);
+00101$:
+	ld	hl,(__usart)
+	ld	de,#0x000d
+	add	hl,de
+	ld	a,(hl)
+	rlca
+	rlca
+	jr	NC,00104$
+	jr	00101$
+00106$:
+;usart.c:72: return size;
+	ld	l, c
+	ld	h, b
+	ld	sp, ix
+	pop	ix
+	ret
+;usart.c:75: int usart_read(uint8_t *buffer, size_t count)
+;	---------------------------------
+; Function usart_read
+; ---------------------------------
+_usart_read::
+	push	ix
+	ld	ix,#0
+	add	ix,sp
+	ld	hl,#-6
+	add	hl,sp
+	ld	sp,hl
+;usart.c:77: uint8_t *bp = buffer;
+	ld	a,4 (ix)
+	ld	-6 (ix),a
+	ld	a,5 (ix)
+	ld	-5 (ix),a
+;usart.c:80: while (count--) {
+	ld	c,6 (ix)
+	ld	b,7 (ix)
+	ld	-4 (ix),#0x00
+	ld	-3 (ix),#0x00
+00105$:
+	ld	e, c
+	ld	d, b
+	dec	bc
+	ld	a,d
+	or	a,e
+	jr	Z,00107$
+;usart.c:81: *(bp++) = _usart->buffer;
+	ld	hl,(__usart)
+	ld	e,(hl)
+	pop	hl
+	push	hl
+	ld	(hl),e
+	inc	-6 (ix)
+	jr	NZ,00123$
+	inc	-5 (ix)
+00123$:
+	ld	de,(__usart)
+;usart.c:83: if (_usart->LSR.framing_error || _usart->LSR.parity_error) {
+	ld	hl,#0x000d
+	add	hl,de
+	ld	-2 (ix),l
+	ld	-1 (ix),h
+	ld	l,-2 (ix)
+	ld	h,-1 (ix)
+	ld	a,(hl)
+	rrca
+	rrca
+	rrca
+	and	a,#0x01
+	jr	NZ,00101$
+	ld	l,-2 (ix)
+	ld	h,-1 (ix)
+	ld	a,(hl)
+	rrca
+	rrca
+	and	a,#0x01
+	jr	Z,00102$
+00101$:
+;usart.c:84: bp--; // delete last byte (?)
+	pop	hl
+	push	hl
+	dec	hl
+	ex	(sp), hl
+	jr	00105$
+00102$:
+;usart.c:86: read_count++;
+	inc	-4 (ix)
+	jr	NZ,00105$
+	inc	-3 (ix)
+	jr	00105$
+00107$:
+;usart.c:90: return read_count;
+	pop	bc
+	pop	hl
+	push	hl
+	push	bc
+	ld	sp, ix
+	pop	ix
+	ret
+	.area _CODE
+	.area _INITIALIZER
+__xinit___usart:
+	.dw #0x4000
+	.area _CABS (ABS)
diff --git a/sw/z80_tests/usart/build/usart.lst b/sw/z80_tests/usart/build/usart.lst
new file mode 100644
index 0000000..7706cff
--- /dev/null
+++ b/sw/z80_tests/usart/build/usart.lst
@@ -0,0 +1,441 @@
+                              1 ;--------------------------------------------------------
+                              2 ; File Created by SDCC : free open source ANSI-C Compiler
+                              3 ; Version 3.6.0 #9615 (Linux)
+                              4 ;--------------------------------------------------------
+                              5 	.module usart
+                              6 	.optsdcc -mz80
+                              7 	
+                              8 ;--------------------------------------------------------
+                              9 ; Public variables in this module
+                             10 ;--------------------------------------------------------
+                             11 	.globl _usart_word_length
+                             12 	.globl _usart_set_baudrate
+                             13 	.globl _usart_set_parity
+                             14 	.globl _usart_set_stop_bits
+                             15 	.globl _usart_set_autoflow
+                             16 	.globl _usart_init
+                             17 	.globl _usart_transmit
+                             18 	.globl _usart_receive
+                             19 	.globl _usart_write
+                             20 	.globl _usart_read
+                             21 ;--------------------------------------------------------
+                             22 ; special function registers
+                             23 ;--------------------------------------------------------
+                             24 ;--------------------------------------------------------
+                             25 ; ram data
+                             26 ;--------------------------------------------------------
+                             27 	.area _DATA
+                             28 ;--------------------------------------------------------
+                             29 ; ram data
+                             30 ;--------------------------------------------------------
+                             31 	.area _INITIALIZED
+   0000                      32 __usart:
+   0000                      33 	.ds 2
+                             34 ;--------------------------------------------------------
+                             35 ; absolute external ram data
+                             36 ;--------------------------------------------------------
+                             37 	.area _DABS (ABS)
+                             38 ;--------------------------------------------------------
+                             39 ; global & static initialisations
+                             40 ;--------------------------------------------------------
+                             41 	.area _HOME
+                             42 	.area _GSINIT
+                             43 	.area _GSFINAL
+                             44 	.area _GSINIT
+                             45 ;--------------------------------------------------------
+                             46 ; Home
+                             47 ;--------------------------------------------------------
+                             48 	.area _HOME
+                             49 	.area _HOME
+                             50 ;--------------------------------------------------------
+                             51 ; code
+                             52 ;--------------------------------------------------------
+                             53 	.area _CODE
+                             54 ;usart.c:5: void usart_set_baudrate(uint16_t baudrate)
+                             55 ;	---------------------------------
+                             56 ; Function usart_set_baudrate
+                             57 ; ---------------------------------
+   0000                      58 _usart_set_baudrate::
+   0000 DD E5         [15]   59 	push	ix
+   0002 DD 21 00 00   [14]   60 	ld	ix,#0
+   0006 DD 39         [15]   61 	add	ix,sp
+                             62 ;usart.c:8: _usart->LCR.divisor_latch_access = 1;
+   0008 2Ar00r00      [16]   63 	ld	hl,(__usart)
+   000B 01 04 00      [10]   64 	ld	bc,#0x0004
+   000E 09            [11]   65 	add	hl,bc
+   000F 7E            [ 7]   66 	ld	a,(hl)
+   0010 F6 80         [ 7]   67 	or	a,#0x80
+   0012 77            [ 7]   68 	ld	(hl),a
+                             69 ;usart.c:9: _usart->buffer = 0x00FF & baudrate; // LSBs
+   0013 2Ar00r00      [16]   70 	ld	hl,(__usart)
+   0016 DD 4E 04      [19]   71 	ld	c,4 (ix)
+   0019 71            [ 7]   72 	ld	(hl),c
+                             73 ;usart.c:10: memcpy(&_usart->IER, &(baudrate >>8), 1);
+   001A ED 5Br00r00   [20]   74 	ld	de,(__usart)
+   001E 13            [ 6]   75 	inc	de
+   001F DD 6E 05      [19]   76 	ld	l,5 (ix)
+   0022 26 00         [ 7]   77 	ld	h,#0x00
+   0024 7E            [ 7]   78 	ld	a, (hl)
+   0025 12            [ 7]   79 	ld	(de), a
+                             80 ;usart.c:12: _usart->LCR.divisor_latch_access = 0;
+   0026 2Ar00r00      [16]   81 	ld	hl,(__usart)
+   0029 01 04 00      [10]   82 	ld	bc,#0x0004
+   002C 09            [11]   83 	add	hl,bc
+   002D 7E            [ 7]   84 	ld	a,(hl)
+   002E E6 7F         [ 7]   85 	and	a,#0x7f
+   0030 77            [ 7]   86 	ld	(hl),a
+   0031 DD E1         [14]   87 	pop	ix
+   0033 C9            [10]   88 	ret
+                             89 ;usart.c:15: void usart_set_parity(int mode)
+                             90 ;	---------------------------------
+                             91 ; Function usart_set_parity
+                             92 ; ---------------------------------
+   0034                      93 _usart_set_parity::
+                             94 ;usart.c:18: _usart->LCR.even_parity = 1;
+   0034 2Ar00r00      [16]   95 	ld	hl,(__usart)
+   0037 01 04 00      [10]   96 	ld	bc,#0x0004
+   003A 09            [11]   97 	add	hl,bc
+                             98 ;usart.c:17: if (mode == USART_PARITY_EVEN) {
+   003B FD 21 02 00   [14]   99 	ld	iy,#2
+   003F FD 39         [15]  100 	add	iy,sp
+   0041 FD 7E 00      [19]  101 	ld	a,0 (iy)
+   0044 3D            [ 4]  102 	dec	a
+   0045 20 0C         [12]  103 	jr	NZ,00104$
+   0047 FD 7E 01      [19]  104 	ld	a,1 (iy)
+   004A B7            [ 4]  105 	or	a, a
+   004B 20 06         [12]  106 	jr	NZ,00104$
+                            107 ;usart.c:18: _usart->LCR.even_parity = 1;
+   004D 7E            [ 7]  108 	ld	a,(hl)
+   004E F6 10         [ 7]  109 	or	a,#0x10
+   0050 77            [ 7]  110 	ld	(hl),a
+   0051 18 17         [12]  111 	jr	00105$
+   0053                     112 00104$:
+                            113 ;usart.c:20: else if (mode == USART_PARITY_ODD) {
+   0053 FD 21 02 00   [14]  114 	ld	iy,#2
+   0057 FD 39         [15]  115 	add	iy,sp
+   0059 FD 7E 00      [19]  116 	ld	a,0 (iy)
+   005C D6 02         [ 7]  117 	sub	a, #0x02
+   005E 20 0A         [12]  118 	jr	NZ,00105$
+   0060 FD 7E 01      [19]  119 	ld	a,1 (iy)
+   0063 B7            [ 4]  120 	or	a, a
+   0064 20 04         [12]  121 	jr	NZ,00105$
+                            122 ;usart.c:21: _usart->LCR.even_parity = 0;
+   0066 7E            [ 7]  123 	ld	a,(hl)
+   0067 E6 EF         [ 7]  124 	and	a,#0xef
+   0069 77            [ 7]  125 	ld	(hl),a
+   006A                     126 00105$:
+                            127 ;usart.c:24: _usart->LCR.parity = (mode == USART_PARITY_NONE) ? 0 : 1;
+   006A 2Ar00r00      [16]  128 	ld	hl,(__usart)
+   006D 01 04 00      [10]  129 	ld	bc,#0x0004
+   0070 09            [11]  130 	add	hl,bc
+   0071 FD 21 02 00   [14]  131 	ld	iy,#2
+   0075 FD 39         [15]  132 	add	iy,sp
+   0077 FD 7E 00      [19]  133 	ld	a,0 (iy)
+   007A 07            [ 4]  134 	rlca
+   007B 07            [ 4]  135 	rlca
+   007C 07            [ 4]  136 	rlca
+   007D E6 F8         [ 7]  137 	and	a,#0xf8
+   007F E6 08         [ 7]  138 	and	a,#0x08
+   0081 4F            [ 4]  139 	ld	c,a
+   0082 7E            [ 7]  140 	ld	a,(hl)
+   0083 E6 F7         [ 7]  141 	and	a,#0xf7
+   0085 B1            [ 4]  142 	or	a,c
+   0086 77            [ 7]  143 	ld	(hl),a
+   0087 C9            [10]  144 	ret
+                            145 ;usart.c:27: void usart_set_stop_bits(int count)
+                            146 ;	---------------------------------
+                            147 ; Function usart_set_stop_bits
+                            148 ; ---------------------------------
+   0088                     149 _usart_set_stop_bits::
+                            150 ;usart.c:29: _usart->LCR.stop_bits = (count == USART_STOP_BITS_1) ? 0 : 1;
+   0088 ED 4Br00r00   [20]  151 	ld	bc,(__usart)
+   008C 03            [ 6]  152 	inc	bc
+   008D 03            [ 6]  153 	inc	bc
+   008E 03            [ 6]  154 	inc	bc
+   008F 03            [ 6]  155 	inc	bc
+   0090 FD 21 02 00   [14]  156 	ld	iy,#2
+   0094 FD 39         [15]  157 	add	iy,sp
+   0096 FD 7E 00      [19]  158 	ld	a,0 (iy)
+   0099 D6 0A         [ 7]  159 	sub	a, #0x0a
+   009B 20 0A         [12]  160 	jr	NZ,00103$
+   009D FD 7E 01      [19]  161 	ld	a,1 (iy)
+   00A0 B7            [ 4]  162 	or	a, a
+   00A1 20 04         [12]  163 	jr	NZ,00103$
+   00A3 3E 01         [ 7]  164 	ld	a,#0x01
+   00A5 18 01         [12]  165 	jr	00104$
+   00A7                     166 00103$:
+   00A7 AF            [ 4]  167 	xor	a,a
+   00A8                     168 00104$:
+   00A8 EE 01         [ 7]  169 	xor	a, #0x01
+   00AA 87            [ 4]  170 	add	a, a
+   00AB 87            [ 4]  171 	add	a, a
+   00AC E6 04         [ 7]  172 	and	a,#0x04
+   00AE 6F            [ 4]  173 	ld	l,a
+   00AF 0A            [ 7]  174 	ld	a,(bc)
+   00B0 E6 FB         [ 7]  175 	and	a,#0xfb
+   00B2 B5            [ 4]  176 	or	a,l
+   00B3 02            [ 7]  177 	ld	(bc),a
+   00B4 C9            [10]  178 	ret
+                            179 ;usart.c:32: void usart_word_length(int length)
+                            180 ;	---------------------------------
+                            181 ; Function usart_word_length
+                            182 ; ---------------------------------
+   00B5                     183 _usart_word_length::
+                            184 ;usart.c:34: _usart->LCR.word_length = length;
+   00B5 2Ar00r00      [16]  185 	ld	hl,(__usart)
+   00B8 01 04 00      [10]  186 	ld	bc,#0x0004
+   00BB 09            [11]  187 	add	hl,bc
+   00BC FD 21 02 00   [14]  188 	ld	iy,#2
+   00C0 FD 39         [15]  189 	add	iy,sp
+   00C2 FD 7E 00      [19]  190 	ld	a,0 (iy)
+   00C5 E6 03         [ 7]  191 	and	a,#0x03
+   00C7 4F            [ 4]  192 	ld	c,a
+   00C8 7E            [ 7]  193 	ld	a,(hl)
+   00C9 E6 FC         [ 7]  194 	and	a,#0xfc
+   00CB B1            [ 4]  195 	or	a,c
+   00CC 77            [ 7]  196 	ld	(hl),a
+   00CD C9            [10]  197 	ret
+                            198 ;usart.c:37: void usart_set_autoflow(int mode)
+                            199 ;	---------------------------------
+                            200 ; Function usart_set_autoflow
+                            201 ; ---------------------------------
+   00CE                     202 _usart_set_autoflow::
+                            203 ;usart.c:39: _usart->MCR.autoflow = (mode == USART_AUTOFLOW_OFF) ? 0 : 1;
+   00CE 2Ar00r00      [16]  204 	ld	hl,(__usart)
+   00D1 01 0C 00      [10]  205 	ld	bc,#0x000c
+   00D4 09            [11]  206 	add	hl,bc
+   00D5 FD 21 02 00   [14]  207 	ld	iy,#2
+   00D9 FD 39         [15]  208 	add	iy,sp
+   00DB FD 7E 00      [19]  209 	ld	a,0 (iy)
+   00DE E6 01         [ 7]  210 	and	a,#0x01
+   00E0 4F            [ 4]  211 	ld	c,a
+   00E1 7E            [ 7]  212 	ld	a,(hl)
+   00E2 E6 FE         [ 7]  213 	and	a,#0xfe
+   00E4 B1            [ 4]  214 	or	a,c
+   00E5 77            [ 7]  215 	ld	(hl),a
+                            216 ;usart.c:40: _usart->MCR.data_terminal_ready = (mode == USART_AUTOFLOW_ALL);
+   00E6 2Ar00r00      [16]  217 	ld	hl,(__usart)
+   00E9 01 05 00      [10]  218 	ld	bc,#0x0005
+   00EC 09            [11]  219 	add	hl,bc
+   00ED FD 7E 00      [19]  220 	ld	a,0 (iy)
+   00F0 D6 03         [ 7]  221 	sub	a, #0x03
+   00F2 20 0A         [12]  222 	jr	NZ,00103$
+   00F4 FD 7E 01      [19]  223 	ld	a,1 (iy)
+   00F7 B7            [ 4]  224 	or	a, a
+   00F8 20 04         [12]  225 	jr	NZ,00103$
+   00FA 3E 01         [ 7]  226 	ld	a,#0x01
+   00FC 18 01         [12]  227 	jr	00104$
+   00FE                     228 00103$:
+   00FE AF            [ 4]  229 	xor	a,a
+   00FF                     230 00104$:
+   00FF E6 01         [ 7]  231 	and	a,#0x01
+   0101 4F            [ 4]  232 	ld	c,a
+   0102 7E            [ 7]  233 	ld	a,(hl)
+   0103 E6 FE         [ 7]  234 	and	a,#0xfe
+   0105 B1            [ 4]  235 	or	a,c
+   0106 77            [ 7]  236 	ld	(hl),a
+   0107 C9            [10]  237 	ret
+                            238 ;usart.c:43: inline void usart_init(uint16_t baudrate, int parity, int stop_bits)
+                            239 ;	---------------------------------
+                            240 ; Function usart_init
+                            241 ; ---------------------------------
+   0108                     242 _usart_init::
+                            243 ;usart.c:45: usart_set_baudrate(baudrate);
+   0108 C1            [10]  244 	pop	bc
+   0109 E1            [10]  245 	pop	hl
+   010A E5            [11]  246 	push	hl
+   010B C5            [11]  247 	push	bc
+   010C E5            [11]  248 	push	hl
+   010D CDr00r00      [17]  249 	call	_usart_set_baudrate
+   0110 F1            [10]  250 	pop	af
+                            251 ;usart.c:46: usart_set_parity(parity);
+   0111 21 04 00      [10]  252 	ld	hl, #4
+   0114 39            [11]  253 	add	hl, sp
+   0115 4E            [ 7]  254 	ld	c, (hl)
+   0116 23            [ 6]  255 	inc	hl
+   0117 46            [ 7]  256 	ld	b, (hl)
+   0118 C5            [11]  257 	push	bc
+   0119 CDr34r00      [17]  258 	call	_usart_set_parity
+   011C F1            [10]  259 	pop	af
+                            260 ;usart.c:47: usart_set_stop_bits(stop_bits);
+   011D 21 06 00      [10]  261 	ld	hl, #6
+   0120 39            [11]  262 	add	hl, sp
+   0121 4E            [ 7]  263 	ld	c, (hl)
+   0122 23            [ 6]  264 	inc	hl
+   0123 46            [ 7]  265 	ld	b, (hl)
+   0124 C5            [11]  266 	push	bc
+   0125 CDr88r00      [17]  267 	call	_usart_set_stop_bits
+                            268 ;usart.c:48: usart_set_autoflow(USART_AUTOFLOW_OFF);
+   0128 21 00 00      [10]  269 	ld	hl, #0x0000
+   012B E3            [19]  270 	ex	(sp),hl
+   012C CDrCEr00      [17]  271 	call	_usart_set_autoflow
+   012F F1            [10]  272 	pop	af
+   0130 C9            [10]  273 	ret
+                            274 ;usart.c:51: void usart_transmit(uint8_t data)
+                            275 ;	---------------------------------
+                            276 ; Function usart_transmit
+                            277 ; ---------------------------------
+   0131                     278 _usart_transmit::
+                            279 ;usart.c:53: _usart->buffer = data;
+   0131 2Ar00r00      [16]  280 	ld	hl,(__usart)
+   0134 FD 21 02 00   [14]  281 	ld	iy,#2
+   0138 FD 39         [15]  282 	add	iy,sp
+   013A FD 7E 00      [19]  283 	ld	a,0 (iy)
+   013D 77            [ 7]  284 	ld	(hl),a
+                            285 ;usart.c:54: while (_usart->LSR.transmitter_holder_empty == 0); // wait
+   013E                     286 00101$:
+   013E 2Ar00r00      [16]  287 	ld	hl,(__usart)
+   0141 01 0D 00      [10]  288 	ld	bc,#0x000d
+   0144 09            [11]  289 	add	hl,bc
+   0145 7E            [ 7]  290 	ld	a,(hl)
+   0146 07            [ 4]  291 	rlca
+   0147 07            [ 4]  292 	rlca
+   0148 07            [ 4]  293 	rlca
+   0149 30 F3         [12]  294 	jr	NC,00101$
+   014B C9            [10]  295 	ret
+                            296 ;usart.c:57: uint8_t usart_receive()
+                            297 ;	---------------------------------
+                            298 ; Function usart_receive
+                            299 ; ---------------------------------
+   014C                     300 _usart_receive::
+                            301 ;usart.c:59: return _usart->buffer;
+   014C 2Ar00r00      [16]  302 	ld	hl,(__usart)
+   014F 6E            [ 7]  303 	ld	l,(hl)
+   0150 C9            [10]  304 	ret
+                            305 ;usart.c:62: int usart_write(uint8_t *data, size_t size)
+                            306 ;	---------------------------------
+                            307 ; Function usart_write
+                            308 ; ---------------------------------
+   0151                     309 _usart_write::
+   0151 DD E5         [15]  310 	push	ix
+   0153 DD 21 00 00   [14]  311 	ld	ix,#0
+   0157 DD 39         [15]  312 	add	ix,sp
+   0159 F5            [11]  313 	push	af
+                            314 ;usart.c:64: uint8_t *dp = data;
+   015A DD 7E 04      [19]  315 	ld	a,4 (ix)
+   015D DD 77 FE      [19]  316 	ld	-2 (ix),a
+   0160 DD 7E 05      [19]  317 	ld	a,5 (ix)
+   0163 DD 77 FF      [19]  318 	ld	-1 (ix),a
+                            319 ;usart.c:66: while (size--) {
+   0166 DD 4E 06      [19]  320 	ld	c,6 (ix)
+   0169 DD 46 07      [19]  321 	ld	b,7 (ix)
+   016C                     322 00104$:
+   016C 59            [ 4]  323 	ld	e, c
+   016D 50            [ 4]  324 	ld	d, b
+   016E 0B            [ 6]  325 	dec	bc
+   016F 7A            [ 4]  326 	ld	a,d
+   0170 B3            [ 4]  327 	or	a,e
+   0171 28 1E         [12]  328 	jr	Z,00106$
+                            329 ;usart.c:67: _usart->buffer = *(dp++);
+   0173 ED 5Br00r00   [20]  330 	ld	de,(__usart)
+   0177 E1            [10]  331 	pop	hl
+   0178 E5            [11]  332 	push	hl
+   0179 7E            [ 7]  333 	ld	a,(hl)
+   017A DD 34 FE      [23]  334 	inc	-2 (ix)
+   017D 20 03         [12]  335 	jr	NZ,00126$
+   017F DD 34 FF      [23]  336 	inc	-1 (ix)
+   0182                     337 00126$:
+   0182 12            [ 7]  338 	ld	(de),a
+                            339 ;usart.c:68: while (_usart->LSR.transmitter_empty);
+   0183                     340 00101$:
+   0183 2Ar00r00      [16]  341 	ld	hl,(__usart)
+   0186 11 0D 00      [10]  342 	ld	de,#0x000d
+   0189 19            [11]  343 	add	hl,de
+   018A 7E            [ 7]  344 	ld	a,(hl)
+   018B 07            [ 4]  345 	rlca
+   018C 07            [ 4]  346 	rlca
+   018D 30 DD         [12]  347 	jr	NC,00104$
+   018F 18 F2         [12]  348 	jr	00101$
+   0191                     349 00106$:
+                            350 ;usart.c:72: return size;
+   0191 69            [ 4]  351 	ld	l, c
+   0192 60            [ 4]  352 	ld	h, b
+   0193 DD F9         [10]  353 	ld	sp, ix
+   0195 DD E1         [14]  354 	pop	ix
+   0197 C9            [10]  355 	ret
+                            356 ;usart.c:75: int usart_read(uint8_t *buffer, size_t count)
+                            357 ;	---------------------------------
+                            358 ; Function usart_read
+                            359 ; ---------------------------------
+   0198                     360 _usart_read::
+   0198 DD E5         [15]  361 	push	ix
+   019A DD 21 00 00   [14]  362 	ld	ix,#0
+   019E DD 39         [15]  363 	add	ix,sp
+   01A0 21 FA FF      [10]  364 	ld	hl,#-6
+   01A3 39            [11]  365 	add	hl,sp
+   01A4 F9            [ 6]  366 	ld	sp,hl
+                            367 ;usart.c:77: uint8_t *bp = buffer;
+   01A5 DD 7E 04      [19]  368 	ld	a,4 (ix)
+   01A8 DD 77 FA      [19]  369 	ld	-6 (ix),a
+   01AB DD 7E 05      [19]  370 	ld	a,5 (ix)
+   01AE DD 77 FB      [19]  371 	ld	-5 (ix),a
+                            372 ;usart.c:80: while (count--) {
+   01B1 DD 4E 06      [19]  373 	ld	c,6 (ix)
+   01B4 DD 46 07      [19]  374 	ld	b,7 (ix)
+   01B7 DD 36 FC 00   [19]  375 	ld	-4 (ix),#0x00
+   01BB DD 36 FD 00   [19]  376 	ld	-3 (ix),#0x00
+   01BF                     377 00105$:
+   01BF 59            [ 4]  378 	ld	e, c
+   01C0 50            [ 4]  379 	ld	d, b
+   01C1 0B            [ 6]  380 	dec	bc
+   01C2 7A            [ 4]  381 	ld	a,d
+   01C3 B3            [ 4]  382 	or	a,e
+   01C4 28 48         [12]  383 	jr	Z,00107$
+                            384 ;usart.c:81: *(bp++) = _usart->buffer;
+   01C6 2Ar00r00      [16]  385 	ld	hl,(__usart)
+   01C9 5E            [ 7]  386 	ld	e,(hl)
+   01CA E1            [10]  387 	pop	hl
+   01CB E5            [11]  388 	push	hl
+   01CC 73            [ 7]  389 	ld	(hl),e
+   01CD DD 34 FA      [23]  390 	inc	-6 (ix)
+   01D0 20 03         [12]  391 	jr	NZ,00123$
+   01D2 DD 34 FB      [23]  392 	inc	-5 (ix)
+   01D5                     393 00123$:
+   01D5 ED 5Br00r00   [20]  394 	ld	de,(__usart)
+                            395 ;usart.c:83: if (_usart->LSR.framing_error || _usart->LSR.parity_error) {
+   01D9 21 0D 00      [10]  396 	ld	hl,#0x000d
+   01DC 19            [11]  397 	add	hl,de
+   01DD DD 75 FE      [19]  398 	ld	-2 (ix),l
+   01E0 DD 74 FF      [19]  399 	ld	-1 (ix),h
+   01E3 DD 6E FE      [19]  400 	ld	l,-2 (ix)
+   01E6 DD 66 FF      [19]  401 	ld	h,-1 (ix)
+   01E9 7E            [ 7]  402 	ld	a,(hl)
+   01EA 0F            [ 4]  403 	rrca
+   01EB 0F            [ 4]  404 	rrca
+   01EC 0F            [ 4]  405 	rrca
+   01ED E6 01         [ 7]  406 	and	a,#0x01
+   01EF 20 0D         [12]  407 	jr	NZ,00101$
+   01F1 DD 6E FE      [19]  408 	ld	l,-2 (ix)
+   01F4 DD 66 FF      [19]  409 	ld	h,-1 (ix)
+   01F7 7E            [ 7]  410 	ld	a,(hl)
+   01F8 0F            [ 4]  411 	rrca
+   01F9 0F            [ 4]  412 	rrca
+   01FA E6 01         [ 7]  413 	and	a,#0x01
+   01FC 28 06         [12]  414 	jr	Z,00102$
+   01FE                     415 00101$:
+                            416 ;usart.c:84: bp--; // delete last byte (?)
+   01FE E1            [10]  417 	pop	hl
+   01FF E5            [11]  418 	push	hl
+   0200 2B            [ 6]  419 	dec	hl
+   0201 E3            [19]  420 	ex	(sp), hl
+   0202 18 BB         [12]  421 	jr	00105$
+   0204                     422 00102$:
+                            423 ;usart.c:86: read_count++;
+   0204 DD 34 FC      [23]  424 	inc	-4 (ix)
+   0207 20 B6         [12]  425 	jr	NZ,00105$
+   0209 DD 34 FD      [23]  426 	inc	-3 (ix)
+   020C 18 B1         [12]  427 	jr	00105$
+   020E                     428 00107$:
+                            429 ;usart.c:90: return read_count;
+   020E C1            [10]  430 	pop	bc
+   020F E1            [10]  431 	pop	hl
+   0210 E5            [11]  432 	push	hl
+   0211 C5            [11]  433 	push	bc
+   0212 DD F9         [10]  434 	ld	sp, ix
+   0214 DD E1         [14]  435 	pop	ix
+   0216 C9            [10]  436 	ret
+                            437 	.area _CODE
+                            438 	.area _INITIALIZER
+   0000                     439 __xinit___usart:
+   0000 00 40               440 	.dw #0x4000
+                            441 	.area _CABS (ABS)
diff --git a/sw/z80_tests/usart/build/usart.rel b/sw/z80_tests/usart/build/usart.rel
new file mode 100644
index 0000000..480c037
--- /dev/null
+++ b/sw/z80_tests/usart/build/usart.rel
@@ -0,0 +1,182 @@
+XL2
+H 9 areas B global symbols
+M usart
+O -mz80
+S .__.ABS. Def0000
+A _CODE size 217 flags 0 addr 0
+S _usart_read Def0198
+S _usart_set_autoflow Def00CE
+S _usart_word_length Def00B5
+S _usart_receive Def014C
+S _usart_write Def0151
+S _usart_transmit Def0131
+S _usart_set_baudrate Def0000
+S _usart_init Def0108
+S _usart_set_stop_bits Def0088
+S _usart_set_parity Def0034
+A _DATA size 0 flags 0 addr 0
+A _INITIALIZED size 2 flags 0 addr 0
+A _DABS size 0 flags 8 addr 0
+A _HOME size 0 flags 0 addr 0
+A _GSINIT size 0 flags 0 addr 0
+A _GSFINAL size 0 flags 0 addr 0
+A _INITIALIZER size 2 flags 0 addr 0
+A _CABS size 0 flags 8 addr 0
+T 00 00
+R 00 00 02 00
+T 00 00
+R 00 00 02 00
+T 00 00
+R 00 00 00 00
+T 00 00 DD E5 DD 21 00 00 DD 39 2A 00 00 01 04 00
+R 00 00 00 00 00 0B 02 00
+T 0E 00 09 7E F6 80 77 2A 00 00 DD 4E 04 71 ED 5B
+R 00 00 00 00 00 08 02 00
+T 1C 00 00 00 13 DD 6E 05 26 00 7E 12 2A 00 00 01
+R 00 00 00 00 00 02 02 00 00 0D 02 00
+T 2A 00 04 00 09 7E E6 7F 77 DD E1 C9
+R 00 00 00 00
+T 34 00
+R 00 00 00 00
+T 34 00 2A 00 00 01 04 00 09 FD 21 02 00 FD 39 FD
+R 00 00 00 00 00 03 02 00
+T 42 00 7E 00 3D 20 0C FD 7E 01 B7 20 06 7E F6 10
+R 00 00 00 00
+T 50 00 77 18 17
+R 00 00 00 00
+T 53 00
+R 00 00 00 00
+T 53 00 FD 21 02 00 FD 39 FD 7E 00 D6 02 20 0A FD
+R 00 00 00 00
+T 61 00 7E 01 B7 20 04 7E E6 EF 77
+R 00 00 00 00
+T 6A 00
+R 00 00 00 00
+T 6A 00 2A 00 00 01 04 00 09 FD 21 02 00 FD 39 FD
+R 00 00 00 00 00 03 02 00
+T 78 00 7E 00 07 07 07 E6 F8 E6 08 4F 7E E6 F7 B1
+R 00 00 00 00
+T 86 00 77 C9
+R 00 00 00 00
+T 88 00
+R 00 00 00 00
+T 88 00 ED 4B 00 00 03 03 03 03 FD 21 02 00 FD 39
+R 00 00 00 00 00 04 02 00
+T 96 00 FD 7E 00 D6 0A 20 0A FD 7E 01 B7 20 04 3E
+R 00 00 00 00
+T A4 00 01 18 01
+R 00 00 00 00
+T A7 00
+R 00 00 00 00
+T A7 00 AF
+R 00 00 00 00
+T A8 00
+R 00 00 00 00
+T A8 00 EE 01 87 87 E6 04 6F 0A E6 FB B5 02 C9
+R 00 00 00 00
+T B5 00
+R 00 00 00 00
+T B5 00 2A 00 00 01 04 00 09 FD 21 02 00 FD 39 FD
+R 00 00 00 00 00 03 02 00
+T C3 00 7E 00 E6 03 4F 7E E6 FC B1 77 C9
+R 00 00 00 00
+T CE 00
+R 00 00 00 00
+T CE 00 2A 00 00 01 0C 00 09 FD 21 02 00 FD 39 FD
+R 00 00 00 00 00 03 02 00
+T DC 00 7E 00 E6 01 4F 7E E6 FE B1 77 2A 00 00 01
+R 00 00 00 00 00 0D 02 00
+T EA 00 05 00 09 FD 7E 00 D6 03 20 0A FD 7E 01 B7
+R 00 00 00 00
+T F8 00 20 04 3E 01 18 01
+R 00 00 00 00
+T FE 00
+R 00 00 00 00
+T FE 00 AF
+R 00 00 00 00
+T FF 00
+R 00 00 00 00
+T FF 00 E6 01 4F 7E E6 FE B1 77 C9
+R 00 00 00 00
+T 08 01
+R 00 00 00 00
+T 08 01 C1 E1 E5 C5 E5 CD 00 00 F1 21 04 00 39 4E
+R 00 00 00 00 00 08 00 00
+T 16 01 23 46 C5 CD 34 00 F1 21 06 00 39 4E 23 46
+R 00 00 00 00 00 06 00 00
+T 24 01 C5 CD 88 00 21 00 00 E3 CD CE 00 F1 C9
+R 00 00 00 00 00 04 00 00 00 0B 00 00
+T 31 01
+R 00 00 00 00
+T 31 01 2A 00 00 FD 21 02 00 FD 39 FD 7E 00 77
+R 00 00 00 00 00 03 02 00
+T 3E 01
+R 00 00 00 00
+T 3E 01 2A 00 00 01 0D 00 09 7E 07 07 07 30 F3 C9
+R 00 00 00 00 00 03 02 00
+T 4C 01
+R 00 00 00 00
+T 4C 01 2A 00 00 6E C9
+R 00 00 00 00 00 03 02 00
+T 51 01
+R 00 00 00 00
+T 51 01 DD E5 DD 21 00 00 DD 39 F5 DD 7E 04 DD 77
+R 00 00 00 00
+T 5F 01 FE DD 7E 05 DD 77 FF DD 4E 06 DD 46 07
+R 00 00 00 00
+T 6C 01
+R 00 00 00 00
+T 6C 01 59 50 0B 7A B3 28 1E ED 5B 00 00 E1 E5 7E
+R 00 00 00 00 00 0B 02 00
+T 7A 01 DD 34 FE 20 03 DD 34 FF
+R 00 00 00 00
+T 82 01
+R 00 00 00 00
+T 82 01 12
+R 00 00 00 00
+T 83 01
+R 00 00 00 00
+T 83 01 2A 00 00 11 0D 00 19 7E 07 07 30 DD 18 F2
+R 00 00 00 00 00 03 02 00
+T 91 01
+R 00 00 00 00
+T 91 01 69 60 DD F9 DD E1 C9
+R 00 00 00 00
+T 98 01
+R 00 00 00 00
+T 98 01 DD E5 DD 21 00 00 DD 39 21 FA FF 39 F9 DD
+R 00 00 00 00
+T A6 01 7E 04 DD 77 FA DD 7E 05 DD 77 FB DD 4E 06
+R 00 00 00 00
+T B4 01 DD 46 07 DD 36 FC 00 DD 36 FD 00
+R 00 00 00 00
+T BF 01
+R 00 00 00 00
+T BF 01 59 50 0B 7A B3 28 48 2A 00 00 5E E1 E5 73
+R 00 00 00 00 00 0A 02 00
+T CD 01 DD 34 FA 20 03 DD 34 FB
+R 00 00 00 00
+T D5 01
+R 00 00 00 00
+T D5 01 ED 5B 00 00 21 0D 00 19 DD 75 FE DD 74 FF
+R 00 00 00 00 00 04 02 00
+T E3 01 DD 6E FE DD 66 FF 7E 0F 0F 0F E6 01 20 0D
+R 00 00 00 00
+T F1 01 DD 6E FE DD 66 FF 7E 0F 0F E6 01 28 06
+R 00 00 00 00
+T FE 01
+R 00 00 00 00
+T FE 01 E1 E5 2B E3 18 BB
+R 00 00 00 00
+T 04 02
+R 00 00 00 00
+T 04 02 DD 34 FC 20 B6 DD 34 FD 18 B1
+R 00 00 00 00
+T 0E 02
+R 00 00 00 00
+T 0E 02 C1 E1 E5 C5 DD F9 DD E1 C9
+R 00 00 00 00
+T 00 00
+R 00 00 07 00
+T 00 00 00 40
+R 00 00 07 00
diff --git a/sw/z80_tests/usart/build/usart.sym b/sw/z80_tests/usart/build/usart.sym
new file mode 100644
index 0000000..a6e3c38
--- /dev/null
+++ b/sw/z80_tests/usart/build/usart.sym
@@ -0,0 +1,38 @@
+ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 1.
+Hexadecimal [16-Bits]
+
+Symbol Table
+
+    .__.$$$.                                                    =  2710 L
+    .__.ABS.                                                    =  0000 G
+    .__.CPU.                                                    =  0000 L
+    .__.H$L.                                                    =  0000 L
+  2 __usart                                                        0000 R
+  7 __xinit___usart                                                0000 R
+  0 _usart_init                                                    0108 GR
+  0 _usart_read                                                    0198 GR
+  0 _usart_receive                                                 014C GR
+  0 _usart_set_autoflow                                            00CE GR
+  0 _usart_set_baudrate                                            0000 GR
+  0 _usart_set_parity                                              0034 GR
+  0 _usart_set_stop_bits                                           0088 GR
+  0 _usart_transmit                                                0131 GR
+  0 _usart_word_length                                             00B5 GR
+  0 _usart_write                                                   0151 GR
+
+
+ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 2.
+Hexadecimal [16-Bits]
+
+Area Table
+
+   0 _CODE                                      size  217   flags    0
+   1 _DATA                                      size    0   flags    0
+   2 _INITIALIZED                               size    2   flags    0
+   3 _DABS                                      size    0   flags    8
+   4 _HOME                                      size    0   flags    0
+   5 _GSINIT                                    size    0   flags    0
+   6 _GSFINAL                                   size    0   flags    0
+   7 _INITIALIZER                               size    2   flags    0
+   8 _CABS                                      size    0   flags    8
+
diff --git a/sw/z80_test/crt0.s b/sw/z80_tests/usart/crt0.s
index 7701ca6..c272f06 100644
--- a/sw/z80_test/crt0.s
+++ b/sw/z80_tests/usart/crt0.s
@@ -96,6 +96,7 @@ gsinit::
 	; ld	de, #s__INITIALIZED
 	; ld	hl, #s__INITIALIZER
 	ldir
+
 gsinit_next:
 
 	.area   _GSFINAL
diff --git a/sw/z80_test/devices.h b/sw/z80_tests/usart/devices.h
index a846f9b..a846f9b 100644
--- a/sw/z80_test/devices.h
+++ b/sw/z80_tests/usart/devices.h
diff --git a/sw/z80_test/main.c b/sw/z80_tests/usart/main.c
index d2e1d8e..d2e1d8e 100644
--- a/sw/z80_test/main.c
+++ b/sw/z80_tests/usart/main.c
diff --git a/sw/z80_test/makefile b/sw/z80_tests/usart/makefile
index 6f054ae..080f41c 100644
--- a/sw/z80_test/makefile
+++ b/sw/z80_tests/usart/makefile
@@ -11,7 +11,7 @@ BINARY  	:= build/$(OSNAME).bin
 
 ### 
 # compiler settings
-
+#
 CC 		:= sdcc
 
 CFLAGS	:= -mz80 \
diff --git a/sw/z80_test/types.h b/sw/z80_tests/usart/types.h
index 815fc68..815fc68 100644
--- a/sw/z80_test/types.h
+++ b/sw/z80_tests/usart/types.h
diff --git a/sw/z80_tests/usart/usart.c b/sw/z80_tests/usart/usart.c
new file mode 120000
index 0000000..2927470
--- /dev/null
+++ b/sw/z80_tests/usart/usart.c
@@ -0,0 +1 @@
+../../z80/kernel/drivers/usart.c
\ No newline at end of file
diff --git a/sw/z80_tests/usart/usart.h b/sw/z80_tests/usart/usart.h
new file mode 120000
index 0000000..84ee24d
--- /dev/null
+++ b/sw/z80_tests/usart/usart.h
@@ -0,0 +1 @@
+../../z80/kernel/include/drivers/usart.h
\ No newline at end of file