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-rw-r--r--sw/cpld_test/cpld_test.lct63
1 files changed, 0 insertions, 63 deletions
diff --git a/sw/cpld_test/cpld_test.lct b/sw/cpld_test/cpld_test.lct
deleted file mode 100644
index 62d7d9d..0000000
--- a/sw/cpld_test/cpld_test.lct
+++ /dev/null
@@ -1,63 +0,0 @@
-[Device]
-Family=M4A5;
-PartNumber=M4A5-32/32-10JC;
-Package=44PLCC;
-PartType=M4A5-32/32;
-Speed=-10;
-Operating_condition=COM;
-Status=Production;
-
-[Revision]
-Parent=m4a5.lci;
-DATE=06/01/2017;
-TIME=13:49:11;
-Source_Format=Pure_VHDL;
-Synthesis=Synplify;
-
-[Ignore Assignments]
-
-[Clear Assignments]
-
-[Backannotate Assignments]
-
-[Global Constraints]
-
-[Location Assignments]
-Layer = Off;
-
-[Group Assignments]
-Layer = Off;
-
-[Resource Reservations]
-Layer = Off;
-
-[Fitter Report Format]
-
-[Power]
-
-[Source Constraint Option]
-
-[Fast Bypass]
-
-[OSM Bypass]
-
-[Input Registers]
-
-[Netlist/Delay Format]
-
-[IO Types]
-Layer = off;
-
-[Pullup]
-
-[Slewrate]
-
-[Region]
-
-[Timing Constraints]
-
-[HSI Attributes]
-
-[Input Delay]
-
-