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-rw-r--r--sw/z80/tests/ram/build/test.z8073
1 files changed, 73 insertions, 0 deletions
diff --git a/sw/z80/tests/ram/build/test.z80 b/sw/z80/tests/ram/build/test.z80
new file mode 100644
index 0000000..25a162a
--- /dev/null
+++ b/sw/z80/tests/ram/build/test.z80
@@ -0,0 +1,73 @@
+;
+; DZ80 V3.4.1 Z80 Disassembly of build/test.bin
+; 2017/09/26 09:42
+;
+ org 0x0
+;
+X0000: halt
+;
+ jr X0000
+;
+X0003: ld c,0x0
+X0005: ld b,c
+ inc c
+ ld hl,X8200
+ ld (hl),b
+ jr X0005
+;
+ rst 0x38
+;
+ org 0x10
+;
+ reti
+;
+ rst 0x38
+;
+ org 0x18
+;
+ reti
+;
+ rst 0x38
+;
+ org 0x20
+;
+ reti
+;
+ rst 0x38
+;
+ org 0x28
+;
+ reti
+;
+ rst 0x38
+;
+ org 0x30
+;
+ reti
+;
+ rst 0x38
+;
+ org 0x38
+;
+ reti
+;
+ rst 0x38
+;
+ org 0x100
+;
+ ld sp,Xffff
+ call X0003
+ jp X0000
+;
+; Miscellaneous equates
+;
+; These are addresses referenced in the code but
+; which are in the middle of a multibyte instruction
+; or are addresses outside the initialized space
+;
+X8200 equ 0x8200
+Xffff equ 0xffff
+;
+ end
+;
+