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path: root/hw/Project Outputs for z80uPC/z80uPC.pdf (follow)
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* start printed circuit board designNao Pross2017-04-281-0/+0
| | | | | | | | | wired: - clock circiuts - reset button set layout for: - CPU & memory - serial interface
* schematic completeNao Pross2017-04-041-0/+0
| | | | | | hw: change address decoder chip from GAL16V8 to M4-32/32 (CPLD) change main bus connector with a custom one (intead of PC/104) start building footprint library
* changed scheme layoutNao Pross2017-03-231-0/+0
hw: changed scheme and annotated components doc: added build script for windows sw: added res/ folder with blaster and created jedec document for address decoder pld