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author | Nao Pross <naopross@thearcway.org> | 2017-11-01 15:14:01 +0100 |
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committer | Nao Pross <naopross@thearcway.org> | 2017-11-01 15:14:01 +0100 |
commit | e5cc2ae8302bca6f7c4b25df344a4f18d953bb7f (patch) | |
tree | e8754729dcf44d545220b123d1b346244d492d2f /techwsw | |
parent | Added circuit diagrams for inverter, non-inverter and summing opamp (diff) | |
download | Essence-e5cc2ae8302bca6f7c4b25df344a4f18d953bb7f.tar.gz Essence-e5cc2ae8302bca6f7c4b25df344a4f18d953bb7f.zip |
Starts essence of TecHWSW
Diffstat (limited to 'techwsw')
-rw-r--r-- | techwsw/build/essence_of_hwsw.pdf | bin | 0 -> 52668 bytes | |||
-rw-r--r-- | techwsw/essence_of_hwsw.tex | 18 | ||||
-rw-r--r-- | techwsw/makefile | 29 | ||||
-rw-r--r-- | techwsw/res/memorie/ram.pdf | bin | 0 -> 20425 bytes | |||
-rw-r--r-- | techwsw/res/memorie/ram.svg | 906 | ||||
-rw-r--r-- | techwsw/res/memorie/rom.pdf | bin | 0 -> 6280 bytes | |||
-rw-r--r-- | techwsw/res/memorie/rom.svg | 99 | ||||
-rw-r--r-- | techwsw/tex/memorie.tex | 57 |
8 files changed, 1109 insertions, 0 deletions
diff --git a/techwsw/build/essence_of_hwsw.pdf b/techwsw/build/essence_of_hwsw.pdf Binary files differnew file mode 100644 index 0000000..652dd61 --- /dev/null +++ b/techwsw/build/essence_of_hwsw.pdf diff --git a/techwsw/essence_of_hwsw.tex b/techwsw/essence_of_hwsw.tex new file mode 100644 index 0000000..d8b6bab --- /dev/null +++ b/techwsw/essence_of_hwsw.tex @@ -0,0 +1,18 @@ +\documentclass[a4paper]{article}
+
+% math
+\usepackage{amsmath}
+
+% figures
+\usepackage{float}
+\usepackage{graphicx}
+
+\title{Hardware e Software}
+\author{Naoki Pross}
+
+\begin{document}
+\maketitle
+
+\include{tex/memorie}
+
+\end{document}
\ No newline at end of file diff --git a/techwsw/makefile b/techwsw/makefile new file mode 100644 index 0000000..240e907 --- /dev/null +++ b/techwsw/makefile @@ -0,0 +1,29 @@ +# file settings +BUILD_DIR := build +DOCUMENT := essence_of_hwsw.tex + +# tex settings +TEX := xelatex \ + -interaction=nonstopmode \ + -halt-on-error \ + -output-directory=$(BUILD_DIR) + +# automated stuff +_DOCUMENT := $(BUILD_DIR)/$(DOCUMENT) + +_SVGS := $(shell find res/ -type f -name '*.svg') +_PDFS := $(patsubst %.svg, %.pdf,$(_SVGS)) + + +# recipes +.PHONY: build_dir +all: $(_DOCUMENT) + +$(_DOCUMENT): $(DOCUMENT) $(_PDFS) build_dir + $(TEX) $< + +$(_PDFS): res/%.pdf: res/%.svg $(_SVGS) + inkscape -z -D --file=$< --export-pdf=$@ + +build_dir: + mkdir -p $(BUILD_DIR)/tex diff --git a/techwsw/res/memorie/ram.pdf b/techwsw/res/memorie/ram.pdf Binary files differnew file mode 100644 index 0000000..0700a01 --- /dev/null +++ b/techwsw/res/memorie/ram.pdf diff --git a/techwsw/res/memorie/ram.svg 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id="tspan5420">ยท</tspan>m</tspan></tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-variant:normal;font-weight:normal;font-stretch:normal;font-size:3.26319432px;line-height:1.25;font-family:'Latin Modern Roman';-inkscape-font-specification:'Latin Modern Roman, ';font-variant-ligatures:normal;font-variant-caps:normal;font-variant-numeric:normal;font-feature-settings:normal;text-align:start;letter-spacing:0px;word-spacing:0px;writing-mode:lr-tb;text-anchor:start;fill:#000000;fill-opacity:1;stroke:none;stroke-width:0.26458332px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1" + x="3.96875" + y="290.38541" + id="text5416"><tspan + sodipodi:role="line" + id="tspan5414" + x="3.96875" + y="293.42343" + style="stroke-width:0.26458332px" /></text> + </g> +</svg> diff --git a/techwsw/tex/memorie.tex b/techwsw/tex/memorie.tex new file mode 100644 index 0000000..eb0fa5c --- /dev/null +++ b/techwsw/tex/memorie.tex @@ -0,0 +1,57 @@ +\section{Le memorie}
+
+%\subsection{Cos'\`e una memoria}
+
+\subsection{Classificazione delle memorie}
+
+\subsection{Tipi di accesso alle memorie}
+
+\subsection{Memorie a sola lettura}
+\subsubsection{Read Only Memory ({\tt ROM})}
+
+La memoria ROM \`e un circuito combinatorio che fornisce in uscita una serie di
+dati $Y_0\dotso Y_{m-1}$ in corrispondenza ad una serie di ingressi $A_0\dotso
+A_{n-1}$. Con $n$ bit in ingresso si possono avere fino a $2^n$ celle di
+dimensione $m$ in uscita.
+In questo tipo di memoria come implica il nomele informazioni vengono conservate
+permanentemente nella configurazione del circuito, siccome esso sono costituite
+da un decodificatore ed un codificatore.
+
+%% TODO: schema intero rom
+
+\subsubsection{Programmable Read Only Memory ({\tt PROM})}
+
+\subsection{Memorie non volatili ({\tt NVRWM})}
+\subsection{Memorie a scrittura e lettura}
+\subsubsection{Random Access Memory ({\tt RAM})}
+
+In una memoeria ad acesso casuale, o memoria RAM (Random Access Memory), una
+qualsiasi locazione (della) \`e individuata da un numero (indirizzo o address) e
+il suo contenuto pu\`o essere letto o modificato in un intervallo di tempo
+costante detto \emph{tempo di accesso} $t_a$.
+
+%% doc: 01c memorie principali.pdf
+\begin{figure}[h!]
+ \includegraphics[width=\textwidth]{res/memorie/ram}
+\end{figure}
+
+Quando viene richiesta un' operazione di lettura con il segnale {\tt R},
+l'indirizzo comanda il multiplexer per passare sull'uscita il dato
+contenuto alla locazione richiesta. Nell'operazione di scrittura il segnale {\tt
+W} abilita la scrittura del dato presente in ingresso nella cella indicata
+tramite il demultiplexer.
+
+ La RAM pu\`o essere di tipo \emph{statico} o
+\emph{dinamico}. Le {\tt SRAM} (static RAM) sono dei flip-flops, mentre le {\tt
+DRAM} (dynamic RAM) sono dei microcondensatori C-MOS nei quali 1 corrisponde al
+condensatore carico e 0 corrisponde al condensatore scarico.
+
+% Nella pratica si utano sempre RAM dinamice per l'elevata capacitit\`a di
+% integrazione e per i costi pi\`u bassi rispetto a quelle statiche.
+
+\paragraph{La RAM dinamica} avendo un comportamento elettrico tipico dei
+condenstatori, essa \`e soggetta alla scarica, cio\`e tende a perdere l'informazione
+contenuta, perci\`o necessitano di essere ricaricate regolarmente con della
+circuiteria che esegue un \emph{refresh}.
+
+$$\cdot$$
|