summaryrefslogtreecommitdiffstats
path: root/hal/uart1.tpp
diff options
context:
space:
mode:
Diffstat (limited to 'hal/uart1.tpp')
-rw-r--r--hal/uart1.tpp52
1 files changed, 26 insertions, 26 deletions
diff --git a/hal/uart1.tpp b/hal/uart1.tpp
index 9526650..544ec73 100644
--- a/hal/uart1.tpp
+++ b/hal/uart1.tpp
@@ -15,36 +15,36 @@ extern "C" {
void __ISR(_UART_1_VECTOR, IPL1AUTO) usart_1_isr()
{
- if (IFS1bits.U1RXIF) {
- uart::rx_buffer[0].push_back(static_cast<uint8_t>(U1RXREG));
+ if (IFS1bits.U1RXIF) {
+ uart::rx_buffer[0].push_back(static_cast<uint8_t>(U1RXREG));
- IFS1bits.U1RXIF = 0;
- } else if (IFS1bits.U1TXIF) {
+ IFS1bits.U1RXIF = 0;
+ } else if (IFS1bits.U1TXIF) {
IFS1bits.U1TXIF = 0;
- }
+ }
}
namespace uart
{
- template<>
- void initialize<1>()
- {
- // STSEL 1S; IREN disabled; PDSEL 8N; RTSMD disabled; RXINV disabled; SIDL disabled; WAKE disabled; ABAUD disabled; LPBACK disabled; BRGH enabled; UEN TX_RX; ON enabled;
- U1MODE = 0x8008;
- // UTXISEL TX_ONE_CHAR; UTXINV disabled; ADDR 0; URXEN disabled; OERR disabled; ADM_EN disabled; URXISEL RX_ONE_CHAR; UTXBRK disabled; UTXEN disabled; ADDEN disabled;
- U1STA = 0x0;
- // U1TXREG 0;
- U1TXREG = 0x0;
- // BaudRate = 9600; Frequency = 1000000 Hz; BRG 25;
- U1BRG = 0x19;
-
- IEC1bits.U1RXIE = 1;
-
- U1STAbits.UTXEN = 1;
- U1STAbits.URXEN = 1;
-
- //Enabling UART
- U1MODEbits.ON = 1;
- }
-} \ No newline at end of file
+ template<>
+ void initialize<1>()
+ {
+ // STSEL 1S; IREN disabled; PDSEL 8N; RTSMD disabled; RXINV disabled; SIDL disabled; WAKE disabled; ABAUD disabled; LPBACK disabled; BRGH enabled; UEN TX_RX; ON enabled;
+ U1MODE = 0x8008;
+ // UTXISEL TX_ONE_CHAR; UTXINV disabled; ADDR 0; URXEN disabled; OERR disabled; ADM_EN disabled; URXISEL RX_ONE_CHAR; UTXBRK disabled; UTXEN disabled; ADDEN disabled;
+ U1STA = 0x0;
+ // U1TXREG 0;
+ U1TXREG = 0x0;
+ // BaudRate = 9600; Frequency = 1000000 Hz; BRG 25;
+ U1BRG = 0x19;
+
+ IEC1bits.U1RXIE = 1;
+
+ U1STAbits.UTXEN = 1;
+ U1STAbits.URXEN = 1;
+
+ //Enabling UART
+ U1MODEbits.ON = 1;
+ }
+}