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authorNao Pross <naopross@thearcway.org>2017-06-16 15:25:54 +0200
committerNao Pross <naopross@thearcway.org>2017-06-16 15:25:54 +0200
commit6105426e159a55cfb15fee3e999bb4fcf6289446 (patch)
tree658b62ff706fcd81674901bc4bfd4dbb9667ebdd /sw/cpld_test/syntmp/cpld_test_srr.htm
parentfixed typo in usart.h and in doc (diff)
downloadz80uPC-6105426e159a55cfb15fee3e999bb4fcf6289446.tar.gz
z80uPC-6105426e159a55cfb15fee3e999bb4fcf6289446.zip
new components list and cpld test unit
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+<html><body><samp><pre>
+<!@TC:1496317911>
+#Build: Synplify Pro I-2014.03LC , Build 063R, May 27 2014
+#install: C:\ispLEVER_Classic2\synpbase
+#OS: Windows 7 6.1
+#Hostname: PC805012
+
+#Implementation: cpld_test
+
+<a name=compilerReport1>$ Start of Compile</a>
+#Thu Jun 01 13:51:51 2017
+
+Synopsys VHDL Compiler, version comp201403rcp1, Build 060R, built May 27 2014
+@N: : <!@TM:1496317911> | Running in 32-bit mode
+Copyright (C) 1994-2014 Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, or distribution of this software is strictly prohibited.
+
+@N:<a href="@N:CD720:@XP_HELP">CD720</a> : <a href="C:\ispLEVER_Classic2\synpbase\lib\vhd\std.vhd:123:18:123:22:@N:CD720:@XP_MSG">std.vhd(123)</a><!@TM:1496317911> | Setting time resolution to ns
+Top entity isn't set yet!
+<a name=error2><font color=red>@E:<a href="@E:CD169:@XP_HELP">CD169</a> : <a href="\\nas001\account_pif\_prossn\samb_3\lab3\projects\z80upc\sw\cpld_test\cpld_test.vhd:7:1:7:7:@E:CD169:@XP_MSG">cpld_test.vhd(7)</a><!@TM:1496317911> | Illegal declaration</font>
+<a name=error3><font color=red>@E:<a href="@E:CD213:@XP_HELP">CD213</a> : <a href="\\nas001\account_pif\_prossn\samb_3\lab3\projects\z80upc\sw\cpld_test\cpld_test.vhd:13:1:13:8:@E:CD213:@XP_MSG">cpld_test.vhd(13)</a><!@TM:1496317911> | Undefined identifier</font>
+2 errors parsing file \\nas001\account_pif\_prossn\samb_3\lab3\projects\z80upc\sw\cpld_test\cpld_test.vhd
+@END
+<a name=error4><font color=red>@E: : <!@TM:1496317911> | Parse errors encountered - exiting</font>
+Process took 0h:00m:01s realtime, 0h:00m:01s cputime
+# Thu Jun 01 13:51:51 2017
+
+###########################################################]
+
+</pre></samp></body></html>