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authorNao Pross <naopross@thearcway.org>2017-10-05 12:17:37 +0200
committerNao Pross <naopross@thearcway.org>2017-10-05 12:17:37 +0200
commitf000d406809d8a7a0e71c388ebfb15d7564728e4 (patch)
tree2284c66b0459e9456fb451feaa4290e5d99e4349 /sw/z80_tests/usart/build/sample.z80
parentMerge remote-tracking branch 'origin/atlas' into naopross (diff)
downloadz80uPC-f000d406809d8a7a0e71c388ebfb15d7564728e4.tar.gz
z80uPC-f000d406809d8a7a0e71c388ebfb15d7564728e4.zip
Test units are now in their own folder 'z80_test', add programmer cli interface
Diffstat (limited to 'sw/z80_tests/usart/build/sample.z80')
-rw-r--r--sw/z80_tests/usart/build/sample.z80558
1 files changed, 558 insertions, 0 deletions
diff --git a/sw/z80_tests/usart/build/sample.z80 b/sw/z80_tests/usart/build/sample.z80
new file mode 100644
index 0000000..965a0d8
--- /dev/null
+++ b/sw/z80_tests/usart/build/sample.z80
@@ -0,0 +1,558 @@
+;
+; DZ80 V3.4.1 Z80 Disassembly of build/sample.bin
+; 2017/09/25 17:08
+;
+ org 0x0
+;
+X0000: jp X0100
+;
+ org 0x4
+;
+X0004: rst 0x38
+X0005: rst 0x38
+X0006: rst 0x38
+;
+ org 0x8
+;
+ reti
+;
+X000a: rst 0x38
+;
+ org 0xc
+;
+X000c: rst 0x38
+X000d: rst 0x38
+;
+ org 0x10
+;
+ reti
+;
+ rst 0x38
+;
+ org 0x18
+;
+ reti
+;
+ rst 0x38
+;
+ org 0x20
+;
+ reti
+;
+ rst 0x38
+;
+ org 0x28
+;
+ reti
+;
+ rst 0x38
+;
+ org 0x30
+;
+ reti
+;
+ rst 0x38
+;
+ org 0x38
+;
+ reti
+;
+ rst 0x38
+;
+ org 0x100
+;
+X0100: ld sp,X0000
+ call X0b15
+ call X08b4
+ jp X0804
+;
+ org 0x800
+;
+ ld a,0x2
+ rst 8
+ ret
+;
+X0804: ld a,0x0
+ rst 8
+X0807: halt
+;
+ jr X0807
+;
+ ld hl,X0002
+ add hl,sp
+ ld iy,X2000
+ ld a,(iy+0x0)
+ add a,(hl)
+ ld c,a
+ ld a,(iy+0x1)
+ inc hl
+ adc a,(hl)
+ ld b,a
+ ld hl,X0004
+ add hl,sp
+ ld a,(hl)
+ ld (bc),a
+ ret
+;
+ ld hl,X0002
+ add hl,sp
+ ld iy,X2002
+ ld a,(iy+0x0)
+ add a,(hl)
+ ld c,a
+ ld a,(iy+0x1)
+ inc hl
+ adc a,(hl)
+ ld b,a
+ ld hl,X0004
+ add hl,sp
+ ld a,(hl)
+ ld (bc),a
+ ret
+;
+ ld hl,X0004
+ add hl,sp
+ ld a,(hl)
+ rrca
+ rrca
+ and 0xc0
+ or 0xf
+ ld c,a
+ pop de
+ pop hl
+ push hl
+ push de
+ ld iy,(X2002)
+ ld e,l
+ ld d,h
+ add iy,de
+ ld (iy+0x0),c
+ ld iy,X0004
+ add iy,sp
+ ld a,(iy+0x0)
+ sub 0x3
+ ret nz
+ ld a,(iy+0x1)
+ or a
+ ret nz
+ ld iy,X0006
+ add iy,sp
+ ld c,(iy+0x0)
+ ld de,(X2002)
+ add hl,de
+ ld (hl),c
+ ret
+;
+ ld hl,X0004
+ add hl,sp
+ ld a,(hl)
+ or 0x7
+ ld c,a
+ pop de
+ pop hl
+ push hl
+ push de
+ ld de,(X2002)
+ add hl,de
+ ld (hl),c
+ ret
+;
+ ld hl,X0004
+ add hl,sp
+ ld a,(hl)
+ or 0x17
+ ld c,a
+ pop de
+ pop hl
+ push hl
+ push de
+ ld iy,(X2002)
+ ld e,l
+ ld d,h
+ add iy,de
+ ld (iy+0x0),c
+ ld iy,X0006
+ add iy,sp
+ ld c,(iy+0x0)
+ ld de,(X2002)
+ add hl,de
+ ld (hl),c
+ ret
+;
+X08b4: ld hl,X000a
+ push hl
+ ld l,0x1
+ push hl
+ ld l,0x60
+ push hl
+ call X0a00
+ ld hl,X0006
+ add hl,sp
+ ld sp,hl
+ ld hl,X000d
+ push hl
+ ld hl,X08e2
+ push hl
+ call X0a49
+ pop af
+ pop af
+X08d3: ld hl,X0005
+ push hl
+ ld hl,X08f1
+ push hl
+ call X0a49
+ pop af
+ pop af
+ jr X08d3
+;
+X08e2: ld c,b
+ ld h,l
+ ld l,h
+ ld l,h
+ ld l,a
+ inc l
+ jr nz,X0941
+ ld l,a
+ ld (hl),d
+ ld l,h
+ ld h,h
+ ld hl,X000a
+X08f1: ld h,h
+ ld l,a
+ ld l,(hl)
+ ld h,l
+ ld a,(bc)
+ nop
+ ret
+;
+X08f8: push ix
+ ld ix,X0000
+ add ix,sp
+ ld hl,(X2004)
+ ld bc,X0004
+ add hl,bc
+ ld a,(hl)
+ or 0x80
+ ld (hl),a
+ ld hl,(X2004)
+ ld c,(ix+0x4)
+ ld (hl),c
+ ld de,(X2004)
+ inc de
+ ld l,(ix+0x5)
+ ld h,0x0
+ ld a,(hl)
+ ld (de),a
+ ld hl,(X2004)
+ ld bc,X0004
+ add hl,bc
+ ld a,(hl)
+ and 0x7f
+ ld (hl),a
+ pop ix
+ ret
+;
+X092c: ld hl,(X2004)
+ ld bc,X0004
+ add hl,bc
+ ld iy,X0002
+ add iy,sp
+ ld a,(iy+0x0)
+ dec a
+ jr nz,X094b
+ ld a,(iy+0x1)
+ or a
+ jr nz,X094b
+ ld a,(hl)
+ or 0x10
+ ld (hl),a
+ jr X0962
+;
+X094b: ld iy,X0002
+ add iy,sp
+ ld a,(iy+0x0)
+ sub 0x2
+ jr nz,X0962
+ ld a,(iy+0x1)
+ or a
+ jr nz,X0962
+ ld a,(hl)
+ and 0xef
+ ld (hl),a
+X0962: ld hl,(X2004)
+ ld bc,X0004
+ add hl,bc
+ ld iy,X0002
+ add iy,sp
+ ld a,(iy+0x0)
+ rlca
+ rlca
+ rlca
+ and 0xf8
+ and 0x8
+ ld c,a
+ ld a,(hl)
+ and 0xf7
+ or c
+ ld (hl),a
+ ret
+;
+X0980: ld bc,(X2004)
+ inc bc
+ inc bc
+ inc bc
+ inc bc
+ ld iy,X0002
+ add iy,sp
+ ld a,(iy+0x0)
+ sub 0xa
+ jr nz,X099f
+ ld a,(iy+0x1)
+ or a
+ jr nz,X099f
+ ld a,0x1
+ jr X09a0
+;
+X099f: xor a
+X09a0: xor 0x1
+ add a,a
+ add a,a
+ and 0x4
+ ld l,a
+ ld a,(bc)
+ and 0xfb
+ or l
+ ld (bc),a
+ ret
+;
+ ld hl,(X2004)
+ ld bc,X0004
+ add hl,bc
+ ld iy,X0002
+ add iy,sp
+ ld a,(iy+0x0)
+ and 0x3
+ ld c,a
+ ld a,(hl)
+ and 0xfc
+ or c
+ ld (hl),a
+ ret
+;
+X09c6: ld hl,(X2004)
+ ld bc,X000c
+ add hl,bc
+ ld iy,X0002
+ add iy,sp
+ ld a,(iy+0x0)
+ and 0x1
+ ld c,a
+ ld a,(hl)
+ and 0xfe
+ or c
+ ld (hl),a
+ ld hl,(X2004)
+ ld bc,X0005
+ add hl,bc
+ ld a,(iy+0x0)
+ sub 0x3
+ jr nz,X09f6
+ ld a,(iy+0x1)
+ or a
+ jr nz,X09f6
+ ld a,0x1
+ jr X09f7
+;
+X09f6: xor a
+X09f7: and 0x1
+ ld c,a
+ ld a,(hl)
+ and 0xfe
+ or c
+ ld (hl),a
+ ret
+;
+X0a00: pop bc
+ pop hl
+ push hl
+ push bc
+ push hl
+ call X08f8
+ pop af
+ ld hl,X0004
+ add hl,sp
+ ld c,(hl)
+ inc hl
+ ld b,(hl)
+ push bc
+ call X092c
+ pop af
+ ld hl,X0006
+ add hl,sp
+ ld c,(hl)
+ inc hl
+ ld b,(hl)
+ push bc
+ call X0980
+ ld hl,X0000
+ ex (sp),hl
+ call X09c6
+ pop af
+ ret
+;
+ ld hl,(X2004)
+ ld iy,X0002
+ add iy,sp
+ ld a,(iy+0x0)
+ ld (hl),a
+X0a36: ld hl,(X2004)
+ ld bc,X000d
+ add hl,bc
+ ld a,(hl)
+ rlca
+ rlca
+ rlca
+ jr nc,X0a36
+ ret
+;
+ ld hl,(X2004)
+ ld l,(hl)
+ ret
+;
+X0a49: push ix
+ ld ix,X0000
+ add ix,sp
+ push af
+ ld a,(ix+0x4)
+ ld (ix+0xfe),a
+ ld a,(ix+0x5)
+ ld (ix+0xff),a
+ ld c,(ix+0x6)
+ ld b,(ix+0x7)
+X0a64: ld e,c
+ ld d,b
+ dec bc
+ ld a,d
+ or e
+ jr z,X0a89
+ ld de,(X2004)
+ pop hl
+ push hl
+ ld a,(hl)
+ inc (ix+0xfe)
+ jr nz,X0a7a
+ inc (ix+0xff)
+X0a7a: ld (de),a
+X0a7b: ld hl,(X2004)
+ ld de,X000d
+ add hl,de
+ ld a,(hl)
+ rlca
+ rlca
+ jr nc,X0a64
+ jr X0a7b
+;
+X0a89: ld l,c
+ ld h,b
+ ld sp,ix
+ pop ix
+ ret
+;
+ push ix
+ ld ix,X0000
+ add ix,sp
+ ld hl,Xfffa
+ add hl,sp
+ ld sp,hl
+ ld a,(ix+0x4)
+ ld (ix+0xfa),a
+ ld a,(ix+0x5)
+ ld (ix+0xfb),a
+ ld c,(ix+0x6)
+ ld b,(ix+0x7)
+ ld (ix+0xfc),0x0
+ ld (ix+0xfd),0x0
+X0ab7: ld e,c
+ ld d,b
+ dec bc
+ ld a,d
+ or e
+ jr z,X0b06
+ ld hl,(X2004)
+ ld e,(hl)
+ pop hl
+ push hl
+ ld (hl),e
+ inc (ix+0xfa)
+ jr nz,X0acd
+ inc (ix+0xfb)
+X0acd: ld de,(X2004)
+ ld hl,X000d
+ add hl,de
+ ld (ix+0xfe),l
+ ld (ix+0xff),h
+ ld l,(ix+0xfe)
+ ld h,(ix+0xff)
+ ld a,(hl)
+ rrca
+ rrca
+ rrca
+ and 0x1
+ jr nz,X0af6
+ ld l,(ix+0xfe)
+ ld h,(ix+0xff)
+ ld a,(hl)
+ rrca
+ rrca
+ and 0x1
+ jr z,X0afc
+X0af6: pop hl
+ push hl
+ dec hl
+ ex (sp),hl
+ jr X0ab7
+;
+X0afc: inc (ix+0xfc)
+ jr nz,X0ab7
+ inc (ix+0xfd)
+ jr X0ab7
+;
+X0b06: pop bc
+ pop hl
+ push hl
+ push bc
+ ld sp,ix
+ pop ix
+ ret
+;
+X0b0f: nop
+ ld b,d
+ ld (bc),a
+ ld b,d
+ nop
+ ld b,b
+X0b15: ld bc,X0006
+ ld a,b
+ or c
+ jr z,X0b24
+ ld de,X2000
+ ld hl,X0b0f
+ ldir
+X0b24: ret
+;
+ rst 0x38
+;
+; Miscellaneous equates
+;
+; These are addresses referenced in the code but
+; which are in the middle of a multibyte instruction
+; or are addresses outside the initialized space
+;
+X0002 equ 0x2
+X2002 equ 0x2002
+X2004 equ 0x2004
+Xfffa equ 0xfffa
+;
+ end
+;
+