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authorNao Pross <naopross@thearcway.org>2017-05-23 11:51:48 +0200
committerNao Pross <naopross@thearcway.org>2017-05-23 11:51:48 +0200
commita29b4fd588d6f3136bfef0d5dc1ee40ead328b15 (patch)
treea39f231b7025c754c9ee643dde6efd416db269ee /hw/Project Logs for z80uPC
parentfinish wiring and add eurocard compliant standard holes (diff)
downloadz80uPC-hardware.tar.gz
z80uPC-hardware.zip
board complete, generate gerber (x2) fileshardware
this is probably the last commit before printing the PCB, unless there are some other errors in the board design
Diffstat (limited to 'hw/Project Logs for z80uPC')
-rw-r--r--hw/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-01.LOG0
-rw-r--r--hw/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-42.LOG11
2 files changed, 11 insertions, 0 deletions
diff --git a/hw/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-01.LOG b/hw/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-01.LOG
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/hw/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-01.LOG
diff --git a/hw/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-42.LOG b/hw/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-42.LOG
new file mode 100644
index 0000000..3ebc3ad
--- /dev/null
+++ b/hw/Project Logs for z80uPC/MainBoard PCB ECO 19.05.2017 16-18-42.LOG
@@ -0,0 +1,11 @@
+Added Component: Designator=J2(KLD-0202)
+Added Pin To Net: NetName=NetC11_2 Pin=J2-1
+Added Pin To Net: NetName=NetC11_2 Pin=J2-1
+Added Pin To Net: NetName=NetC11_2 Pin=J2-1
+Added Pin To Net: NetName=DB9-5 Pin=J2-2
+Added Pin To Net: NetName=DB9-5 Pin=J2-2
+Added Pin To Net: NetName=DB9-5 Pin=J2-2
+Added Pin To Net: NetName=NetJ2_3 Pin=J2-3
+Added Pin To Net: NetName=NetJ2_3 Pin=J2-3
+Added Pin To Net: NetName=NetJ2_3 Pin=J2-3
+Added Member To Class: ClassName=Peripherals Member=Component J2 PWR2.5